diff options
| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2020-12-14 16:18:04 +0100 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2020-12-17 06:22:55 +0000 |
| commit | 2031221fbda5100556933fb225f9199b88aeebac (patch) | |
| tree | d3d2d32efb89160cb1f3bb51e33df0f57f405700 | |
| parent | 8b56c8c6b2694500318eba14e291a0586837ebe8 (diff) | |
| download | coreboot-2031221fbda5100556933fb225f9199b88aeebac.tar.xz | |
soc/intel/cannonlake: Change mainboard_silicon_init_params argument
Use FSPS_UPD instead of FSP_S_CONFIG as argument as already done on
xeon_sp and denverton_ns. This allows to set test config UPDs from
mainboard code as well.
Change-Id: I6d67264e22df32b9210ce88b99d6a7a4f6b97ffb
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48644
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
| -rw-r--r-- | src/mainboard/google/hatch/ramstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/prodrive/hermes/ramstage.c | 4 | ||||
| -rw-r--r-- | src/mainboard/purism/librem_cnl/ramstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/system76/lemp9/ramstage.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/cannonlake/fsp_params.c | 4 | ||||
| -rw-r--r-- | src/soc/intel/cannonlake/include/soc/ramstage.h | 2 |
6 files changed, 9 insertions, 7 deletions
diff --git a/src/mainboard/google/hatch/ramstage.c b/src/mainboard/google/hatch/ramstage.c index af8810063c..93864b2ad1 100644 --- a/src/mainboard/google/hatch/ramstage.c +++ b/src/mainboard/google/hatch/ramstage.c @@ -8,7 +8,7 @@ #include <variant/gpio.h> #include <vendorcode/google/chromeos/chromeos.h> -void mainboard_silicon_init_params(FSP_S_CONFIG *params) +void mainboard_silicon_init_params(FSPS_UPD *supd) { variant_devtree_update(); } diff --git a/src/mainboard/prodrive/hermes/ramstage.c b/src/mainboard/prodrive/hermes/ramstage.c index b8b147d9b6..72ae014409 100644 --- a/src/mainboard/prodrive/hermes/ramstage.c +++ b/src/mainboard/prodrive/hermes/ramstage.c @@ -8,8 +8,10 @@ static fsp_params parmas_list[] = { /* FIXME: Fill with additional options */ }; -void mainboard_silicon_init_params(FSP_S_CONFIG *params) +void mainboard_silicon_init_params(FSPS_UPD *supd) { + FSP_S_CONFIG *params = &supd->FspsConfig; + /* Configure pads prior to SiliconInit() in case there's any dependencies during hardware initialization. */ program_gpio_pads(); diff --git a/src/mainboard/purism/librem_cnl/ramstage.c b/src/mainboard/purism/librem_cnl/ramstage.c index e93911e324..381d03be13 100644 --- a/src/mainboard/purism/librem_cnl/ramstage.c +++ b/src/mainboard/purism/librem_cnl/ramstage.c @@ -3,7 +3,7 @@ #include <soc/ramstage.h> #include "variant.h" -void mainboard_silicon_init_params(FSP_S_CONFIG *params) +void mainboard_silicon_init_params(FSPS_UPD *supd) { /* Configure pads prior to SiliconInit() in case there's any * dependencies during hardware initialization. */ diff --git a/src/mainboard/system76/lemp9/ramstage.c b/src/mainboard/system76/lemp9/ramstage.c index 4b0ddd4823..35ffd53bc1 100644 --- a/src/mainboard/system76/lemp9/ramstage.c +++ b/src/mainboard/system76/lemp9/ramstage.c @@ -3,7 +3,7 @@ #include <soc/ramstage.h> #include "gpio.h" -void mainboard_silicon_init_params(FSP_S_CONFIG *params) +void mainboard_silicon_init_params(FSPS_UPD *supd) { /* Configure pads prior to SiliconInit() in case there's any * dependencies during hardware initialization. */ diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c index 9b28d3d795..73b1bb53ed 100644 --- a/src/soc/intel/cannonlake/fsp_params.c +++ b/src/soc/intel/cannonlake/fsp_params.c @@ -143,7 +143,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) /* Load VBT before devicetree-specific config. */ params->GraphicsConfigPtr = (uintptr_t)vbt_get(); - mainboard_silicon_init_params(params); + mainboard_silicon_init_params(supd); const struct soc_power_limits_config *soc_config; soc_config = &config->power_limits_config; @@ -527,7 +527,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) } /* Mainboard GPIO Configuration */ -__weak void mainboard_silicon_init_params(FSP_S_CONFIG *params) +__weak void mainboard_silicon_init_params(FSPS_UPD *supd) { printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__); } diff --git a/src/soc/intel/cannonlake/include/soc/ramstage.h b/src/soc/intel/cannonlake/include/soc/ramstage.h index 96b11298a7..ff4fd59f8c 100644 --- a/src/soc/intel/cannonlake/include/soc/ramstage.h +++ b/src/soc/intel/cannonlake/include/soc/ramstage.h @@ -9,7 +9,7 @@ #include "../../chip.h" -void mainboard_silicon_init_params(FSP_S_CONFIG *params); +void mainboard_silicon_init_params(FSPS_UPD *supd); void soc_init_pre_device(void *chip_info); #endif |