diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2014-08-27 14:58:43 -0500 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-03-27 08:04:09 +0100 |
| commit | 339f8b313a2ba0ff8c4ab7d5634677290b8d3d4c (patch) | |
| tree | 7e2ffdacbb4f8637421e412e461552f33ef1f1e3 | |
| parent | 3a0013dcde04d197aed2b162c5359ad11ff37536 (diff) | |
| download | coreboot-339f8b313a2ba0ff8c4ab7d5634677290b8d3d4c.tar.xz | |
arm64: make mmu_enable() use previous ttb from mmu_init()
No need to pass in the same value for the ttb after just
calling mmu_init(). All current users are setting this once
and forgetting it.
BUG=chrome-os-partner:31545
BRANCH=None
TEST=Built and booted on ryu.
Change-Id: Ie446d16eaf4ea65a34a9c76dd7c6c2f9b19c5d57
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: bd77461d483b513a569365673c83badc752f4aa8
Original-Change-Id: I54c7e4892d44ea6129429d8a46461d089dd8e2a9
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/214772
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/9016
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
| -rw-r--r-- | src/arch/arm64/armv8/mmu.c | 4 | ||||
| -rw-r--r-- | src/arch/arm64/include/armv8/arch/mmu.h | 6 | ||||
| -rw-r--r-- | src/soc/nvidia/tegra132/mmu_operations.c | 2 |
3 files changed, 7 insertions, 5 deletions
diff --git a/src/arch/arm64/armv8/mmu.c b/src/arch/arm64/armv8/mmu.c index cba1e4d4eb..8045cc0e54 100644 --- a/src/arch/arm64/armv8/mmu.c +++ b/src/arch/arm64/armv8/mmu.c @@ -285,7 +285,7 @@ static uint32_t is_mmu_enabled(void) return (sctlr & SCTLR_M); } -void mmu_enable(uint64_t ttbr) +void mmu_enable(void) { uint32_t sctlr; @@ -301,7 +301,7 @@ void mmu_enable(uint64_t ttbr) TCR_TBI_USED); /* Initialize TTBR */ - raw_write_ttbr0_el3(ttbr); + raw_write_ttbr0_el3((uintptr_t)xlat_addr); /* Ensure all translation table writes are committed before enabling MMU */ dsb(); diff --git a/src/arch/arm64/include/armv8/arch/mmu.h b/src/arch/arm64/include/armv8/arch/mmu.h index 7639bd52a1..a030b1bf73 100644 --- a/src/arch/arm64/include/armv8/arch/mmu.h +++ b/src/arch/arm64/include/armv8/arch/mmu.h @@ -162,7 +162,9 @@ #define TCR_TBI_USED (0x0 << TCR_TBI_SHIFT) #define TCR_TBI_IGNORED (0x1 << TCR_TBI_SHIFT) -void mmu_init(struct memranges *,uint64_t *,uint64_t); -void mmu_enable(uint64_t); +/* Initialize the MMU TTB tables provide the range sequence and ttb buffer. */ +void mmu_init(struct memranges *ranges, uint64_t *ttb, uint64_t ttb_size); +/* Enable the mmu based on previous mmu_init(). */ +void mmu_enable(void); #endif // __ARCH_ARM64_MMU_H__ diff --git a/src/soc/nvidia/tegra132/mmu_operations.c b/src/soc/nvidia/tegra132/mmu_operations.c index 1f6258f02d..6d6869849c 100644 --- a/src/soc/nvidia/tegra132/mmu_operations.c +++ b/src/soc/nvidia/tegra132/mmu_operations.c @@ -95,5 +95,5 @@ void tegra132_mmu_init(void) tz_base_mib *= MiB; ttb_size_mib = TTB_SIZE * MiB; mmu_init(map, (void *)tz_base_mib, ttb_size_mib); - mmu_enable(tz_base_mib); + mmu_enable(); } |