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authorHuayang Duan <huayang.duan@mediatek.com>2018-09-26 21:23:53 +0800
committerPatrick Georgi <pgeorgi@google.com>2019-01-03 22:22:58 +0000
commit4d15d2fc122a3548099504fc1f49d70087ac45ad (patch)
tree24426dfaa1e49f350bbad9c0407d68b4efce1514
parent7b78a805da0207449c5ea1baf56030ab9f54e2d6 (diff)
downloadcoreboot-4d15d2fc122a3548099504fc1f49d70087ac45ad.tar.xz
mediatek/mt8183: Add DDR driver of memory test part
Write a range of memory with special pattern, and read it back to check whether the read value same as write. The test pattern include 8bit offset read write, 16 bit offset read write, 32bit offset read write, and cross testing. BUG=b:80501386 BRANCH=none TEST=Boots correctly on Kukui, and inits DRAM successfully with related patches. Change-Id: I30d5fbd3db2acf36e3058ba4f34558b981fba78c Signed-off-by: Huayang Duan <huayang.duan@mediatek.com> Reviewed-on: https://review.coreboot.org/c/28845 Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: You-Cheng Syu <youcheng@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/soc/mediatek/mt8183/Kconfig10
-rw-r--r--src/soc/mediatek/mt8183/Makefile.inc1
-rw-r--r--src/soc/mediatek/mt8183/memory.c29
3 files changed, 40 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8183/Kconfig b/src/soc/mediatek/mt8183/Kconfig
index b58be7ff88..51c6df3d5f 100644
--- a/src/soc/mediatek/mt8183/Kconfig
+++ b/src/soc/mediatek/mt8183/Kconfig
@@ -19,4 +19,14 @@ config VBOOT
select VBOOT_STARTS_IN_BOOTBLOCK
select VBOOT_SEPARATE_VERSTAGE
+config DEBUG_DRAM
+ bool "Output verbose DRAM related debug messages"
+ default n
+ help
+ This option enables additional DRAM related debug messages.
+
+config MEMORY_TEST
+ bool
+ default y
+
endif
diff --git a/src/soc/mediatek/mt8183/Makefile.inc b/src/soc/mediatek/mt8183/Makefile.inc
index b981e450f8..9aa1733f38 100644
--- a/src/soc/mediatek/mt8183/Makefile.inc
+++ b/src/soc/mediatek/mt8183/Makefile.inc
@@ -26,6 +26,7 @@ romstage-y += dramc_init_setting.c
romstage-y += dramc_pi_basic_api.c
romstage-y += dramc_pi_calibration_api.c
romstage-y += memory.c
+romstage-$(CONFIG_MEMORY_TEST) += ../common/memory_test.c
romstage-y += ../common/gpio.c gpio.c
romstage-y += ../common/mmu_operations.c mmu_operations.c
romstage-y += ../common/pmic_wrap.c pmic_wrap.c mt6358.c
diff --git a/src/soc/mediatek/mt8183/memory.c b/src/soc/mediatek/mt8183/memory.c
index 643ca6bb2f..5702b14a01 100644
--- a/src/soc/mediatek/mt8183/memory.c
+++ b/src/soc/mediatek/mt8183/memory.c
@@ -13,10 +13,39 @@
* GNU General Public License for more details.
*/
+#include <assert.h>
+#include <console/console.h>
+#include <soc/dramc_pi_api.h>
#include <soc/emi.h>
+#include <symbols.h>
void mt_mem_init(const struct sdram_params *params)
{
+ u64 rank_size[RANK_MAX];
+
/* memory calibration */
mt_set_emi(params);
+
+ if (IS_ENABLED(CONFIG_MEMORY_TEST)) {
+ size_t r;
+ u8 *addr = _dram;
+
+ dramc_get_rank_size(rank_size);
+
+ for (r = RANK_0; r < RANK_MAX; r++) {
+ int i;
+
+ if (rank_size[r] == 0)
+ break;
+
+ i = complex_mem_test(addr, 0x2000);
+
+ printk(BIOS_DEBUG, "[MEM] complex R/W mem test %s : %d\n",
+ (i == 0) ? "pass" : "fail", i);
+
+ ASSERT(i == 0);
+
+ addr += rank_size[r];
+ }
+ }
}