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| author | Richard Spiegel <richard.spiegel@amd.corp-partner.google.com> | 2019-06-18 18:21:41 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-07-18 16:23:04 +0000 |
| commit | 55471147e57b6f29373edb620b6cb5f2e82cd012 (patch) | |
| tree | 6948ec3f717399945cee93089a453560a2a922d2 | |
| parent | c76bfac088021df631364a092fe12449ba916e30 (diff) | |
| download | coreboot-55471147e57b6f29373edb620b6cb5f2e82cd012.tar.xz | |
vendorcode/amd/pi: Integrate Merlin Falcon as a build option
Add changes needed to build a project using Merlin Falcon SOC using 00670F00
vendor code, which is backward compatible with Merlin Falcon. Only the AGESA
binary image is different then the one used by 00670F00.
BUG=none.
TEST=Tested later with padmelon board.
Change-Id: Id3341f6a1ef2561a6391d3db8c54f6bdd09b0c0e
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33622
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
| -rw-r--r-- | src/vendorcode/amd/pi/00670F00/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/vendorcode/amd/pi/Kconfig | 5 |
2 files changed, 5 insertions, 2 deletions
diff --git a/src/vendorcode/amd/pi/00670F00/Makefile.inc b/src/vendorcode/amd/pi/00670F00/Makefile.inc index 790955a1d0..fef7dff342 100644 --- a/src/vendorcode/amd/pi/00670F00/Makefile.inc +++ b/src/vendorcode/amd/pi/00670F00/Makefile.inc @@ -28,7 +28,7 @@ # #***************************************************************************** -ifeq ($(CONFIG_SOC_AMD_STONEYRIDGE_FP4)$(CONFIG_SOC_AMD_STONEYRIDGE_FT4),y) +ifeq ($(CONFIG_SOC_AMD_MERLINFALCON)$(CONFIG_SOC_AMD_STONEYRIDGE_FP4)$(CONFIG_SOC_AMD_STONEYRIDGE_FT4),y) # AGESA V5 Files AGESA_ROOT = $(call strip_quotes,$(CONFIG_AGESA_BINARY_PI_VENDORCODE_PATH)) diff --git a/src/vendorcode/amd/pi/Kconfig b/src/vendorcode/amd/pi/Kconfig index f463b7d2e9..08e7cc6697 100644 --- a/src/vendorcode/amd/pi/Kconfig +++ b/src/vendorcode/amd/pi/Kconfig @@ -26,12 +26,13 @@ # SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. # -if CPU_AMD_PI_00630F01 || CPU_AMD_PI_00730F01 || CPU_AMD_PI_00660F01 || SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4 +if CPU_AMD_PI_00630F01 || CPU_AMD_PI_00730F01 || CPU_AMD_PI_00660F01 || SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4 || SOC_AMD_MERLINFALCON config AGESA_BINARY_PI_VENDORCODE_PATH string "AGESA PI directory path" default "src/vendorcode/amd/pi/00630F01" if CPU_AMD_PI_00630F01 default "src/vendorcode/amd/pi/00730F01" if CPU_AMD_PI_00730F01 + default "src/vendorcode/amd/pi/00670F00" if SOC_AMD_MERLINFALCON default "src/vendorcode/amd/pi/00670F00" if SOC_AMD_STONEYRIDGE_FP4 default "src/vendorcode/amd/pi/00670F00" if SOC_AMD_STONEYRIDGE_FT4 default "src/vendorcode/amd/pi/00660F01" if CPU_AMD_PI_00660F01 @@ -43,6 +44,8 @@ config AGESA_BINARY_PI_FILE string "AGESA PI binary file name" default "3rdparty/blobs/pi/amd/00630F01/FP3/AGESA.bin" if CPU_AMD_PI_00630F01 default "3rdparty/blobs/pi/amd/00730F01/FT3b/AGESA.bin" if CPU_AMD_PI_00730F01 + default "3rdparty/blobs/pi/amd/merlinfalcon/FP4/AGESA_CZ_FP4.bin" if SOC_AMD_MERLINFALCON && HAVE_MERLINFALCON_BINARIES + default "3rdparty/blobs/pi/amd/00670F00/FP4/AGESA.bin" if SOC_AMD_MERLINFALCON && !HAVE_MERLINFALCON_BINARIES default "3rdparty/blobs/pi/amd/00670F00/FP4/AGESA.bin" if SOC_AMD_STONEYRIDGE_FP4 default "3rdparty/blobs/pi/amd/00670F00/FT4/AGESA.bin" if SOC_AMD_STONEYRIDGE_FT4 default "3rdparty/blobs/pi/amd/00660F01/FP4/AGESA.bin" if CPU_AMD_PI_00660F01 |