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| author | Arthur Heymans <arthur@aheymans.xyz> | 2018-12-28 12:04:51 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-01-03 18:06:33 +0000 |
| commit | 5aee981ece2df091eb2866d45560af6475a089e1 (patch) | |
| tree | a8729f62dae67df367d762dd489a719257939f20 | |
| parent | 055d4f25d17b02a8c876094a716411e4f44f3c1a (diff) | |
| download | coreboot-5aee981ece2df091eb2866d45560af6475a089e1.tar.xz | |
mb/foxconn/d41s: Program the subsystemid
Change-Id: I4f9d0cfc9a5bfa259d734f194b015e7be1694ceb
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/30472
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
| -rw-r--r-- | src/mainboard/foxconn/d41s/devicetree.cb | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/src/mainboard/foxconn/d41s/devicetree.cb b/src/mainboard/foxconn/d41s/devicetree.cb index 0fd9e29cc9..21e87626b6 100644 --- a/src/mainboard/foxconn/d41s/devicetree.cb +++ b/src/mainboard/foxconn/d41s/devicetree.cb @@ -26,6 +26,7 @@ chip northbridge/intel/pineview # Northbridge end end device domain 0 on # PCI domain + subsystemid 0x105b 0x0d55 inherit device pci 0.0 on end # Host Bridge device pci 1.0 off end # PEG device pci 2.0 on end # Integrated graphics controller @@ -45,7 +46,9 @@ chip northbridge/intel/pineview # Northbridge device pci 1b.0 on end # Audio device pci 1c.0 on end # PCIe 1 - device pci 1c.1 on end # PCIe 2 (NIC) + device pci 1c.1 on # PCIe 2 (NIC) + device pci 00.0 on end + end device pci 1c.2 off end # PCIe 3 device pci 1c.3 off end # PCIe 4 # (PCIe 5 and 6 not on nm10?) |