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authorWarren Turkal <wt@penguintechs.org>2010-09-30 03:13:21 +0000
committerWarren Turkal <wt@penguintechs.org>2010-09-30 03:13:21 +0000
commit7a59a44e17fa728cddd33b08b78db365f743df44 (patch)
treefb80370533f8c1160e3f4acaa8d11b50be77a026
parentafbf072f35a25143540c7e5e1a084fac3a2ea8c2 (diff)
downloadcoreboot-7a59a44e17fa728cddd33b08b78db365f743df44.tar.xz
Move VIA C7 board CAR config to VIA C7 instead of boards.
This change is somewhat dangerous as it enables CAR for some boards that it was not enabled for before. Signed-off-by: Warren Turkal <wt@penguintechs.org> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5882 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/cpu/via/model_c7/Kconfig8
-rw-r--r--src/mainboard/via/vt8454c/Kconfig1
2 files changed, 7 insertions, 2 deletions
diff --git a/src/cpu/via/model_c7/Kconfig b/src/cpu/via/model_c7/Kconfig
index 57fe4e95ef..8e6f0e8765 100644
--- a/src/cpu/via/model_c7/Kconfig
+++ b/src/cpu/via/model_c7/Kconfig
@@ -1,8 +1,14 @@
config CPU_VIA_C7
bool
+
+if CPU_VIA_C7
+
+config CPU_SPECFIC_OPTIONS
+ def_bool y
select UDELAY_TSC
select MMX
select SSE2
+ select CACHE_AS_RAM
config DCACHE_RAM_BASE
hex
@@ -14,4 +20,4 @@ config DCACHE_RAM_SIZE
default 0x8000
depends on CPU_VIA_C7
-
+endif # CPU_VIA_C7
diff --git a/src/mainboard/via/vt8454c/Kconfig b/src/mainboard/via/vt8454c/Kconfig
index 1e882ebc2c..6c08007ba0 100644
--- a/src/mainboard/via/vt8454c/Kconfig
+++ b/src/mainboard/via/vt8454c/Kconfig
@@ -14,7 +14,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select HAVE_HARD_RESET
select HAVE_ACPI_TABLES
select BOARD_ROMSIZE_KB_512
- select CACHE_AS_RAM
select TINY_BOOTBLOCK
config MAINBOARD_DIR