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authorElyes HAOUAS <ehaouas@noos.fr>2019-11-30 19:42:33 +0100
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-12-19 05:38:43 +0000
commit8cf28dbf93a0b8a888ca813e05c4728d62188a45 (patch)
tree0927522d603783871d6bd63dc82811ba89218f41
parent38d2540674e07af2eba981c3be166c6127b02878 (diff)
downloadcoreboot-8cf28dbf93a0b8a888ca813e05c4728d62188a45.tar.xz
soc/{amd,cavium,mediatek,sifive}: Remove unused <stdlib.h>
Change-Id: I83322e246fe81b97188be17a3fdda16d36df0678 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33688 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/soc/amd/picasso/northbridge.c1
-rw-r--r--src/soc/amd/picasso/sm.c1
-rw-r--r--src/soc/amd/stoneyridge/BiosCallOuts.c1
-rw-r--r--src/soc/amd/stoneyridge/northbridge.c1
-rw-r--r--src/soc/amd/stoneyridge/sm.c1
-rw-r--r--src/soc/cavium/cn81xx/cbmem.c1
-rw-r--r--src/soc/cavium/cn81xx/spi.c1
-rw-r--r--src/soc/mediatek/common/ddp.c1
-rw-r--r--src/soc/mediatek/common/spi.c1
-rw-r--r--src/soc/mediatek/mt8173/ddp.c1
-rw-r--r--src/soc/mediatek/mt8173/include/soc/gpio.h1
-rw-r--r--src/soc/mediatek/mt8183/ddp.c1
-rw-r--r--src/soc/sifive/fu540/clock.c1
13 files changed, 0 insertions, 13 deletions
diff --git a/src/soc/amd/picasso/northbridge.c b/src/soc/amd/picasso/northbridge.c
index 4a1493cba3..282f9628ea 100644
--- a/src/soc/amd/picasso/northbridge.c
+++ b/src/soc/amd/picasso/northbridge.c
@@ -33,7 +33,6 @@
#include <soc/pci_devs.h>
#include <soc/iomap.h>
#include <stdint.h>
-#include <stdlib.h>
#include <string.h>
#include <arch/bert_storage.h>
diff --git a/src/soc/amd/picasso/sm.c b/src/soc/amd/picasso/sm.c
index 803e628320..438909d7cb 100644
--- a/src/soc/amd/picasso/sm.c
+++ b/src/soc/amd/picasso/sm.c
@@ -20,7 +20,6 @@
#include <device/smbus.h>
#include <cpu/x86/lapic.h>
#include <arch/ioapic.h>
-#include <stdlib.h>
#include <soc/southbridge.h>
#include <soc/smbus.h>
diff --git a/src/soc/amd/stoneyridge/BiosCallOuts.c b/src/soc/amd/stoneyridge/BiosCallOuts.c
index c55e73499a..2ee92786ee 100644
--- a/src/soc/amd/stoneyridge/BiosCallOuts.c
+++ b/src/soc/amd/stoneyridge/BiosCallOuts.c
@@ -21,7 +21,6 @@
#include <console/console.h>
#include <soc/southbridge.h>
#include <soc/pci_devs.h>
-#include <stdlib.h>
#include <amdblocks/agesawrapper.h>
#include <amdblocks/dimm_spd.h>
#include <amdblocks/car.h>
diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c
index c98d0a9517..cd78ff83a2 100644
--- a/src/soc/amd/stoneyridge/northbridge.c
+++ b/src/soc/amd/stoneyridge/northbridge.c
@@ -36,7 +36,6 @@
#include <soc/pci_devs.h>
#include <soc/iomap.h>
#include <stdint.h>
-#include <stdlib.h>
#include <string.h>
#include <arch/bert_storage.h>
diff --git a/src/soc/amd/stoneyridge/sm.c b/src/soc/amd/stoneyridge/sm.c
index fbcddfab84..2dba0d78df 100644
--- a/src/soc/amd/stoneyridge/sm.c
+++ b/src/soc/amd/stoneyridge/sm.c
@@ -19,7 +19,6 @@
#include <device/smbus.h>
#include <cpu/x86/lapic.h>
#include <arch/ioapic.h>
-#include <stdlib.h>
#include <soc/southbridge.h>
#include <soc/smbus.h>
diff --git a/src/soc/cavium/cn81xx/cbmem.c b/src/soc/cavium/cn81xx/cbmem.c
index a39bf4fe35..284608c3a7 100644
--- a/src/soc/cavium/cn81xx/cbmem.c
+++ b/src/soc/cavium/cn81xx/cbmem.c
@@ -17,7 +17,6 @@
#include <cbmem.h>
#include <soc/addressmap.h>
#include <soc/sdram.h>
-#include <stdlib.h>
#include <symbols.h>
void *cbmem_top_chipset(void)
diff --git a/src/soc/cavium/cn81xx/spi.c b/src/soc/cavium/cn81xx/spi.c
index 2ba25a201a..6a5abb131a 100644
--- a/src/soc/cavium/cn81xx/spi.c
+++ b/src/soc/cavium/cn81xx/spi.c
@@ -25,7 +25,6 @@
#include <soc/clock.h>
#include <spi-generic.h>
#include <spi_flash.h>
-#include <stdlib.h>
#include <timer.h>
union cavium_spi_cfg {
diff --git a/src/soc/mediatek/common/ddp.c b/src/soc/mediatek/common/ddp.c
index 8f1f0e64ac..494f470d10 100644
--- a/src/soc/mediatek/common/ddp.c
+++ b/src/soc/mediatek/common/ddp.c
@@ -15,7 +15,6 @@
#include <device/mmio.h>
#include <edid.h>
-#include <stdlib.h>
#include <stddef.h>
#include <soc/addressmap.h>
#include <soc/ddp.h>
diff --git a/src/soc/mediatek/common/spi.c b/src/soc/mediatek/common/spi.c
index 9271d6e6dc..dbbc14dc18 100644
--- a/src/soc/mediatek/common/spi.c
+++ b/src/soc/mediatek/common/spi.c
@@ -18,7 +18,6 @@
#include <console/console.h>
#include <endian.h>
#include <gpio.h>
-#include <stdlib.h>
#include <soc/pll.h>
#include <soc/spi.h>
#include <timer.h>
diff --git a/src/soc/mediatek/mt8173/ddp.c b/src/soc/mediatek/mt8173/ddp.c
index 555bfe905f..0a57565d94 100644
--- a/src/soc/mediatek/mt8173/ddp.c
+++ b/src/soc/mediatek/mt8173/ddp.c
@@ -15,7 +15,6 @@
#include <device/mmio.h>
#include <edid.h>
-#include <stdlib.h>
#include <stddef.h>
#include <soc/addressmap.h>
#include <soc/ddp.h>
diff --git a/src/soc/mediatek/mt8173/include/soc/gpio.h b/src/soc/mediatek/mt8173/include/soc/gpio.h
index ec0833408e..8a6e13a6f2 100644
--- a/src/soc/mediatek/mt8173/include/soc/gpio.h
+++ b/src/soc/mediatek/mt8173/include/soc/gpio.h
@@ -16,7 +16,6 @@
#define SOC_MEDIATEK_MT8173_GPIO_H
#include <stdint.h>
-#include <stdlib.h>
#include <soc/addressmap.h>
#include <soc/gpio_common.h>
diff --git a/src/soc/mediatek/mt8183/ddp.c b/src/soc/mediatek/mt8183/ddp.c
index 50d6caf776..a54b134e6d 100644
--- a/src/soc/mediatek/mt8183/ddp.c
+++ b/src/soc/mediatek/mt8183/ddp.c
@@ -15,7 +15,6 @@
#include <device/mmio.h>
#include <edid.h>
-#include <stdlib.h>
#include <stddef.h>
#include <soc/addressmap.h>
#include <soc/ddp.h>
diff --git a/src/soc/sifive/fu540/clock.c b/src/soc/sifive/fu540/clock.c
index ef6221b262..a15e639839 100644
--- a/src/soc/sifive/fu540/clock.c
+++ b/src/soc/sifive/fu540/clock.c
@@ -17,7 +17,6 @@
#include <console/console.h>
#include <soc/clock.h>
#include <soc/addressmap.h>
-#include <stdlib.h>
#include <stdint.h>
// 33.33 Mhz after reset