diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2021-04-05 12:12:16 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-04-08 06:47:40 +0000 |
| commit | a3d33795f81417c548e562f7cf12102d41d44f85 (patch) | |
| tree | 6270840e51db402a32de183ac99066acb0e046c4 | |
| parent | 00f53a8d9e18e75aaa44886e083580033a935a70 (diff) | |
| download | coreboot-a3d33795f81417c548e562f7cf12102d41d44f85.tar.xz | |
soc/intel/{cannonlake,icelake}: Drop unhooked `SendVrMbxCmd`
This option's value is not used anywhere. Remove it.
Change-Id: I0f30cddd30d459f48b51f377b111bbc04709c5f8
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52102
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
| -rw-r--r-- | src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb | 3 | ||||
| -rw-r--r-- | src/mainboard/system76/lemp9/devicetree.cb | 3 | ||||
| -rw-r--r-- | src/soc/intel/cannonlake/chip.h | 7 | ||||
| -rw-r--r-- | src/soc/intel/icelake/chip.h | 7 |
4 files changed, 0 insertions, 20 deletions
diff --git a/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb b/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb index fed13258ce..05f2a5670c 100644 --- a/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb +++ b/src/mainboard/clevo/cml-u/variants/l140cu/devicetree.cb @@ -9,9 +9,6 @@ chip soc/intel/cannonlake }, }" - # Send an extra VR mailbox command for the PS4 exit issue - register "SendVrMbxCmd" = "2" - # CPU (soc/intel/cannonlake/cpu.c) # Power limit register "power_limits_config" = "{ diff --git a/src/mainboard/system76/lemp9/devicetree.cb b/src/mainboard/system76/lemp9/devicetree.cb index 313329a083..a0b6403a22 100644 --- a/src/mainboard/system76/lemp9/devicetree.cb +++ b/src/mainboard/system76/lemp9/devicetree.cb @@ -9,9 +9,6 @@ chip soc/intel/cannonlake }, }" - # Send an extra VR mailbox command for the PS4 exit issue - register "SendVrMbxCmd" = "2" - # CPU (soc/intel/cannonlake/cpu.c) # Power limit register "power_limits_config" = "{ diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h index f9f761b5db..f84a48015e 100644 --- a/src/soc/intel/cannonlake/chip.h +++ b/src/soc/intel/cannonlake/chip.h @@ -223,13 +223,6 @@ struct soc_intel_cannonlake_config { /* Enables support for Teton Glacier hybrid storage device */ uint8_t TetonGlacierMode; - /* Enable VR specific mailbox command - * 00b - no VR specific cmd sent - * 01b - VR mailbox cmd specifically for the MPS IMPV8 VR will be sent - * 10b - VR specific cmd sent for PS4 exit issue - * 11b - Reserved */ - uint8_t SendVrMbxCmd; - /* Enable/Disable EIST. 1b:Enabled, 0b:Disabled */ uint8_t eist_enable; diff --git a/src/soc/intel/icelake/chip.h b/src/soc/intel/icelake/chip.h index b878fd6edb..bef9adb4e2 100644 --- a/src/soc/intel/icelake/chip.h +++ b/src/soc/intel/icelake/chip.h @@ -138,13 +138,6 @@ struct soc_intel_icelake_config { * Setting to 0 (default) disables Heci1 and hides the device from OS */ uint8_t HeciEnabled; - /* Enable VR specific mailbox command - * 00b - no VR specific cmd sent - * 01b - VR mailbox cmd specifically for the MPS IMPV8 VR will be sent - * 10b - VR specific cmd sent for PS4 exit issue - * 11b - Reserved */ - uint8_t SendVrMbxCmd; - /* Enable/Disable EIST. 1b:Enabled, 0b:Disabled */ uint8_t eist_enable; |