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authorCliff Huang <cliff.huang@intel.com>2021-02-04 15:37:24 -0800
committerPatrick Georgi <pgeorgi@google.com>2021-03-15 06:24:14 +0000
commitb34be4d4bb248c5b3c1addeb3d3832d64f1bc7e8 (patch)
treeb3fa27233d887e234c1649d854295570c398ff65
parentce97bca09c342f8a418ffc4032e4848345895ab1 (diff)
downloadcoreboot-b34be4d4bb248c5b3c1addeb3d3832d64f1bc7e8.tar.xz
soc/intel/tigerlake: Add CNVi Bluetooth flag at devicetree entry
FSP has added the Cnvi BT Core enabling in addition to the existing CnviMode. This change adds the flag at the soc config side (i.e. soc_intel_tigerlake_config for devicetree). Also, there is no longer PCI host interface for BT. Therefore, BT core should not use the pci port status to turn on/off. TEST: BT enumeration is checked using 'lsusb -d 8087:0026' from OS to make sure BT is turned on. Change-Id: I71c512fe884060e23ee26e7334c575c4c517b78d Signed-off-by: Cliff Huang <cliff.huang@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50897 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
-rw-r--r--src/soc/intel/tigerlake/chip.h3
-rw-r--r--src/soc/intel/tigerlake/fsp_params.c14
2 files changed, 9 insertions, 8 deletions
diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h
index 76a24807fc..cbd687c67f 100644
--- a/src/soc/intel/tigerlake/chip.h
+++ b/src/soc/intel/tigerlake/chip.h
@@ -316,6 +316,9 @@ struct soc_intel_tigerlake_config {
DEBUG_INTERFACE_TRACEHUB = (1 << 5),
} debug_interface_flag;
+ /* CNVi BT Core Enable/Disable */
+ bool CnviBtCore;
+
/* CNVi BT Audio Offload: Enable/Disable BT Audio Offload. */
bool CnviBtAudioOffload;
diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params.c
index 1d57002a6f..0b2c0b0487 100644
--- a/src/soc/intel/tigerlake/fsp_params.c
+++ b/src/soc/intel/tigerlake/fsp_params.c
@@ -106,8 +106,7 @@ static int get_disable_mask(struct soc_intel_tigerlake_config *config)
disable_mask |= LPM_S0i3_3 | LPM_S0i3_4 | LPM_S0i2_2;
/* If CNVi or ISH is used, S0i3.2/S0i3.3/S0i3.4 cannot be achieved. */
- if (is_dev_enabled(pcidev_path_on_root(PCH_DEVFN_CNVI_BT)) ||
- is_dev_enabled(pcidev_path_on_root(PCH_DEVFN_CNVI_WIFI)) ||
+ if (is_dev_enabled(pcidev_path_on_root(PCH_DEVFN_CNVI_WIFI)) ||
is_dev_enabled(pcidev_path_on_root(PCH_DEVFN_ISH)))
disable_mask |= LPM_S0i3_2 | LPM_S0i3_3 | LPM_S0i3_4;
@@ -353,13 +352,12 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
/* CNVi */
dev = pcidev_path_on_root(PCH_DEVFN_CNVI_WIFI);
params->CnviMode = is_dev_enabled(dev);
-
- /* CNVi BT Core */
- dev = pcidev_path_on_root(PCH_DEVFN_CNVI_BT);
- params->CnviBtCore = is_dev_enabled(dev);
-
- /* CNVi BT Audio Offload */
+ params->CnviBtCore = config->CnviBtCore;
params->CnviBtAudioOffload = config->CnviBtAudioOffload;
+ /* Assert if CNVi BT is enabled without CNVi being enabled. */
+ assert(params->CnviMode || !params->CnviBtCore);
+ /* Assert if CNVi BT offload is enabled without CNVi BT being enabled. */
+ assert(params->CnviBtCore || !params->CnviBtAudioOffload);
/* VMD */
dev = pcidev_path_on_root(SA_DEVFN_VMD);