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authorAngel Pons <th3fanbus@gmail.com>2020-07-07 18:27:30 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-07-09 12:46:35 +0000
commitb5320b2dc1a0c2f710929f4a0aa17529b973b62f (patch)
tree09b906b18ae6a09f79c7a9533b4b331abbfc6f71
parent8104effa0dc25bac4693e8d76c1e10039dd47bad (diff)
downloadcoreboot-b5320b2dc1a0c2f710929f4a0aa17529b973b62f.tar.xz
soc/intel/baytrail: Rename "pmc.h" to "pm.h"
This reduces the differences between Bay Trail and Braswell. Tested with BUILD_TIMELESS=1, Google Ninja remains identical. Change-Id: I3d4c1285bdc4b061383b7bb6262f69671166b9c4 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43185 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
-rw-r--r--src/mainboard/google/rambi/irqroute.h2
-rw-r--r--src/mainboard/google/rambi/mainboard_smi.c2
-rw-r--r--src/soc/intel/baytrail/acpi.c2
-rw-r--r--src/soc/intel/baytrail/bootblock/bootblock.c2
-rw-r--r--src/soc/intel/baytrail/ehci.c2
-rw-r--r--src/soc/intel/baytrail/elog.c2
-rw-r--r--src/soc/intel/baytrail/gpio.c2
-rw-r--r--src/soc/intel/baytrail/include/soc/pm.h (renamed from src/soc/intel/baytrail/include/soc/pmc.h)6
-rw-r--r--src/soc/intel/baytrail/lpe.c2
-rw-r--r--src/soc/intel/baytrail/pmutil.c2
-rw-r--r--src/soc/intel/baytrail/ramstage.c2
-rw-r--r--src/soc/intel/baytrail/romstage/pmc.c2
-rw-r--r--src/soc/intel/baytrail/romstage/romstage.c2
-rw-r--r--src/soc/intel/baytrail/smihandler.c2
-rw-r--r--src/soc/intel/baytrail/smm.c2
-rw-r--r--src/soc/intel/baytrail/southcluster.c2
-rw-r--r--src/soc/intel/baytrail/xhci.c2
17 files changed, 19 insertions, 19 deletions
diff --git a/src/mainboard/google/rambi/irqroute.h b/src/mainboard/google/rambi/irqroute.h
index 8d6235886f..b5c4f731ff 100644
--- a/src/mainboard/google/rambi/irqroute.h
+++ b/src/mainboard/google/rambi/irqroute.h
@@ -2,7 +2,7 @@
#include <soc/irq.h>
#include <soc/pci_devs.h>
-#include <soc/pmc.h>
+#include <soc/pm.h>
#define PCI_DEV_PIRQ_ROUTES \
PCI_DEV_PIRQ_ROUTE(GFX_DEV, A, B, C, D), \
diff --git a/src/mainboard/google/rambi/mainboard_smi.c b/src/mainboard/google/rambi/mainboard_smi.c
index 76cc0ed1a4..c434860ea5 100644
--- a/src/mainboard/google/rambi/mainboard_smi.c
+++ b/src/mainboard/google/rambi/mainboard_smi.c
@@ -11,7 +11,7 @@
#include "ec.h"
#include <soc/nvs.h>
-#include <soc/pmc.h>
+#include <soc/pm.h>
/* The wake gpio is SUS_GPIO[0]. */
#define WAKE_GPIO_EN SUS_GPIO_EN0
diff --git a/src/soc/intel/baytrail/acpi.c b/src/soc/intel/baytrail/acpi.c
index 9bcd78698b..8267199ab1 100644
--- a/src/soc/intel/baytrail/acpi.c
+++ b/src/soc/intel/baytrail/acpi.c
@@ -18,7 +18,7 @@
#include <soc/irq.h>
#include <soc/msr.h>
#include <soc/pattrs.h>
-#include <soc/pmc.h>
+#include <soc/pm.h>
#include <ec/google/chromeec/ec.h>
#include <vendorcode/google/chromeos/gnvs.h>
diff --git a/src/soc/intel/baytrail/bootblock/bootblock.c b/src/soc/intel/baytrail/bootblock/bootblock.c
index 0db8d9a40b..54e7261d3b 100644
--- a/src/soc/intel/baytrail/bootblock/bootblock.c
+++ b/src/soc/intel/baytrail/bootblock/bootblock.c
@@ -7,7 +7,7 @@
#include <soc/gpio.h>
#include <soc/lpc.h>
#include <soc/spi.h>
-#include <soc/pmc.h>
+#include <soc/pm.h>
static void setup_mmconfig(void)
{
diff --git a/src/soc/intel/baytrail/ehci.c b/src/soc/intel/baytrail/ehci.c
index 16baa512b8..5ae834efdd 100644
--- a/src/soc/intel/baytrail/ehci.c
+++ b/src/soc/intel/baytrail/ehci.c
@@ -10,7 +10,7 @@
#include <soc/iomap.h>
#include <soc/iosf.h>
#include <soc/pci_devs.h>
-#include <soc/pmc.h>
+#include <soc/pm.h>
#include <soc/ramstage.h>
#include <soc/ehci.h>
diff --git a/src/soc/intel/baytrail/elog.c b/src/soc/intel/baytrail/elog.c
index fa77173dcd..93a43c5a12 100644
--- a/src/soc/intel/baytrail/elog.c
+++ b/src/soc/intel/baytrail/elog.c
@@ -8,7 +8,7 @@
#include <device/pci.h>
#include <elog.h>
#include <soc/iomap.h>
-#include <soc/pmc.h>
+#include <soc/pm.h>
static void log_power_and_resets(const struct chipset_power_state *ps)
{
diff --git a/src/soc/intel/baytrail/gpio.c b/src/soc/intel/baytrail/gpio.c
index a250cf0e1b..38e2d2fbd4 100644
--- a/src/soc/intel/baytrail/gpio.c
+++ b/src/soc/intel/baytrail/gpio.c
@@ -5,7 +5,7 @@
#include <device/pci.h>
#include <console/console.h>
#include <soc/gpio.h>
-#include <soc/pmc.h>
+#include <soc/pm.h>
#include <soc/smm.h>
/* GPIO-to-Pad LUTs */
diff --git a/src/soc/intel/baytrail/include/soc/pmc.h b/src/soc/intel/baytrail/include/soc/pm.h
index 8b18589f16..0481159416 100644
--- a/src/soc/intel/baytrail/include/soc/pmc.h
+++ b/src/soc/intel/baytrail/include/soc/pm.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-#ifndef _BAYTRAIL_PMC_H_
-#define _BAYTRAIL_PMC_H_
+#ifndef _BAYTRAIL_PM_H_
+#define _BAYTRAIL_PM_H_
#include <acpi/acpi.h>
@@ -275,4 +275,4 @@ int rtc_failure(void);
#endif /* !defined(__ASSEMBLER__) && !defined(__ACPI__) */
-#endif /* _BAYTRAIL_PMC_H_ */
+#endif /* _BAYTRAIL_PM_H_ */
diff --git a/src/soc/intel/baytrail/lpe.c b/src/soc/intel/baytrail/lpe.c
index 3a12a4b5a8..c41db94813 100644
--- a/src/soc/intel/baytrail/lpe.c
+++ b/src/soc/intel/baytrail/lpe.c
@@ -15,7 +15,7 @@
#include <soc/nvs.h>
#include <soc/pattrs.h>
#include <soc/pci_devs.h>
-#include <soc/pmc.h>
+#include <soc/pm.h>
#include <soc/ramstage.h>
#include "chip.h"
diff --git a/src/soc/intel/baytrail/pmutil.c b/src/soc/intel/baytrail/pmutil.c
index b6f3130e74..8addc530ce 100644
--- a/src/soc/intel/baytrail/pmutil.c
+++ b/src/soc/intel/baytrail/pmutil.c
@@ -14,7 +14,7 @@
#include <soc/iomap.h>
#include <soc/lpc.h>
#include <soc/pci_devs.h>
-#include <soc/pmc.h>
+#include <soc/pm.h>
#include <security/vboot/vbnv.h>
#if defined(__SIMPLE_DEVICE__)
diff --git a/src/soc/intel/baytrail/ramstage.c b/src/soc/intel/baytrail/ramstage.c
index 995fe20679..099eb588d3 100644
--- a/src/soc/intel/baytrail/ramstage.c
+++ b/src/soc/intel/baytrail/ramstage.c
@@ -18,7 +18,7 @@
#include <soc/nvs.h>
#include <soc/pattrs.h>
#include <soc/pci_devs.h>
-#include <soc/pmc.h>
+#include <soc/pm.h>
#include <soc/ramstage.h>
#include <soc/iosf.h>
diff --git a/src/soc/intel/baytrail/romstage/pmc.c b/src/soc/intel/baytrail/romstage/pmc.c
index 48a8e71118..e495a2bd20 100644
--- a/src/soc/intel/baytrail/romstage/pmc.c
+++ b/src/soc/intel/baytrail/romstage/pmc.c
@@ -9,7 +9,7 @@
#include <soc/iosf.h>
#include <soc/lpc.h>
#include <soc/pci_devs.h>
-#include <soc/pmc.h>
+#include <soc/pm.h>
#include <soc/romstage.h>
#include "../chip.h"
diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c
index fa1735174b..ddd657a404 100644
--- a/src/soc/intel/baytrail/romstage/romstage.c
+++ b/src/soc/intel/baytrail/romstage/romstage.c
@@ -17,7 +17,7 @@
#include <soc/iomap.h>
#include <soc/msr.h>
#include <soc/pci_devs.h>
-#include <soc/pmc.h>
+#include <soc/pm.h>
#include <soc/romstage.h>
static struct chipset_power_state power_state;
diff --git a/src/soc/intel/baytrail/smihandler.c b/src/soc/intel/baytrail/smihandler.c
index e5f53ff4aa..42d63e8610 100644
--- a/src/soc/intel/baytrail/smihandler.c
+++ b/src/soc/intel/baytrail/smihandler.c
@@ -15,7 +15,7 @@
#include <soc/iosf.h>
#include <soc/pci_devs.h>
-#include <soc/pmc.h>
+#include <soc/pm.h>
#include <soc/nvs.h>
static int smm_initialized;
diff --git a/src/soc/intel/baytrail/smm.c b/src/soc/intel/baytrail/smm.c
index c70388abad..d16f9189cd 100644
--- a/src/soc/intel/baytrail/smm.c
+++ b/src/soc/intel/baytrail/smm.c
@@ -8,7 +8,7 @@
#include <cpu/x86/smm.h>
#include <cpu/intel/smm_reloc.h>
#include <soc/iomap.h>
-#include <soc/pmc.h>
+#include <soc/pm.h>
#include <soc/smm.h>
/* Save settings which will be committed in SMI functions. */
diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c
index 38f51ff521..b7157c70f6 100644
--- a/src/soc/intel/baytrail/southcluster.c
+++ b/src/soc/intel/baytrail/southcluster.c
@@ -22,7 +22,7 @@
#include <soc/lpc.h>
#include <soc/nvs.h>
#include <soc/pci_devs.h>
-#include <soc/pmc.h>
+#include <soc/pm.h>
#include <soc/ramstage.h>
#include <soc/spi.h>
#include "chip.h"
diff --git a/src/soc/intel/baytrail/xhci.c b/src/soc/intel/baytrail/xhci.c
index ce526c096d..9ff30e3d59 100644
--- a/src/soc/intel/baytrail/xhci.c
+++ b/src/soc/intel/baytrail/xhci.c
@@ -14,7 +14,7 @@
#include <soc/lpc.h>
#include <soc/pattrs.h>
#include <soc/pci_devs.h>
-#include <soc/pmc.h>
+#include <soc/pm.h>
#include <soc/ramstage.h>
#include <soc/xhci.h>