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authorMatt DeVillier <matt.devillier@gmail.com>2020-03-30 21:56:07 -0500
committerMatt DeVillier <matt.devillier@gmail.com>2020-04-02 20:31:41 +0000
commitc19c704c02da663d1def525b07228a843b0962a0 (patch)
tree46af823c2f0fb51ba478fff1459c57ce590f7ab5
parent28f727b59ba10eec3b3805cc57542643856fbef2 (diff)
downloadcoreboot-c19c704c02da663d1def525b07228a843b0962a0.tar.xz
sb/intel/i82801ix: drop IGD-related NVS variables
NDID/DID entries are no longer used by the GMA SSDT generator, so drop them. SSDT generation will be simplified in a subsequent commit. Remove direct setting of gnvs->ndid in qemu-q35 board since build will otherwise break. Change-Id: Ifbf08f43291c1fff7ccbc85272dc97334207983b Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39954 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/emulation/qemu-q35/acpi_tables.c3
-rw-r--r--src/southbridge/intel/i82801ix/acpi/globalnvs.asl7
-rw-r--r--src/southbridge/intel/i82801ix/lpc.c7
-rw-r--r--src/southbridge/intel/i82801ix/nvs.h5
4 files changed, 1 insertions, 21 deletions
diff --git a/src/mainboard/emulation/qemu-q35/acpi_tables.c b/src/mainboard/emulation/qemu-q35/acpi_tables.c
index 65ff8870fd..793b58e742 100644
--- a/src/mainboard/emulation/qemu-q35/acpi_tables.c
+++ b/src/mainboard/emulation/qemu-q35/acpi_tables.c
@@ -33,9 +33,6 @@ void acpi_create_gnvs(global_nvs_t *gnvs)
/* Enable both COM ports */
gnvs->cmap = 0x01;
gnvs->cmbp = 0x01;
-
- /* IGD Displays */
- gnvs->ndid = 0; /* Will use default of 0x00000400. */
}
diff --git a/src/southbridge/intel/i82801ix/acpi/globalnvs.asl b/src/southbridge/intel/i82801ix/acpi/globalnvs.asl
index 306260e58e..f3a355f71e 100644
--- a/src/southbridge/intel/i82801ix/acpi/globalnvs.asl
+++ b/src/southbridge/intel/i82801ix/acpi/globalnvs.asl
@@ -91,13 +91,6 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
TLST, 8, // 0x3d - Display Toggle List pointer
CADL, 8, // 0x3e - Currently Attached Devices List
PADL, 8, // 0x3f - Previously Attached Devices List
- Offset (0x46),
- NDID, 8, // 0x46 - Number of Device IDs
- DID1, 32, // 0x47 - Device ID 1
- DID2, 32, // 0x4b - Device ID 2
- DID3, 32, // 0x4f - Device ID 3
- DID4, 32, // 0x53 - Device ID 4
- DID5, 32, // 0x57 - Device ID 5
/* Backlight Control */
Offset (0x64),
BLCS, 8, // 0x64 - Backlight control possible?
diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c
index 626016402e..f097f50e02 100644
--- a/src/southbridge/intel/i82801ix/lpc.c
+++ b/src/southbridge/intel/i82801ix/lpc.c
@@ -33,7 +33,6 @@
#include "i82801ix.h"
#include "nvs.h"
#include <southbridge/intel/common/pciehp.h>
-#include <drivers/intel/gma/i915.h>
#include <southbridge/intel/common/acpi_pirq_gen.h>
#define NMI_OFF 0
@@ -488,15 +487,9 @@ static void southbridge_inject_dsdt(struct device *dev)
global_nvs_t *gnvs = cbmem_add (CBMEM_ID_ACPI_GNVS, sizeof(*gnvs));
if (gnvs) {
- const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info();
memset(gnvs, 0, sizeof(*gnvs));
acpi_create_gnvs(gnvs);
- if (gfx) {
- gnvs->ndid = gfx->ndid;
- memcpy(gnvs->did, gfx->did, sizeof(gnvs->did));
- }
-
/* And tell SMI about it */
smm_setup_structures(gnvs, NULL, NULL);
diff --git a/src/southbridge/intel/i82801ix/nvs.h b/src/southbridge/intel/i82801ix/nvs.h
index 815186591f..ce2b9a36c7 100644
--- a/src/southbridge/intel/i82801ix/nvs.h
+++ b/src/southbridge/intel/i82801ix/nvs.h
@@ -73,10 +73,7 @@ typedef struct {
u8 tlst; /* 0x3d - Display Toggle List Pointer */
u8 cadl; /* 0x3e - currently attached devices */
u8 padl; /* 0x3f - previously attached devices */
- u16 rsvd14[3];
- u8 ndid; /* 0x46 - number of device ids */
- u32 did[5]; /* 0x47 - 5b device id 1..5 */
- u8 rsvd5[0x9];
+ u8 rsvd5[36];
/* Backlight Control */
u8 blcs; /* 0x64 - Backlight Control possible */
u8 brtl;