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author | Patrick Georgi <patrick.georgi@coresystems.de> | 2009-04-27 20:19:48 +0000 |
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committer | Patrick Georgi <patrick.georgi@coresystems.de> | 2009-04-27 20:19:48 +0000 |
commit | d107593691631ff1ae34fbb98d03d5085ed5b07a (patch) | |
tree | 2cd4e29d4d4f194e12c38ad19250bd6b3a16b07f | |
parent | 55faef348a8dd20ac777f75fe00e8772a7655d7a (diff) | |
download | coreboot-d107593691631ff1ae34fbb98d03d5085ed5b07a.tar.xz |
Add high table support to via vt8454c.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4222 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r-- | src/mainboard/via/vt8454c/Options.lb | 10 | ||||
-rw-r--r-- | src/mainboard/via/vt8454c/mainboard.c | 15 | ||||
-rw-r--r-- | src/northbridge/via/cx700/northbridge.c | 12 |
3 files changed, 37 insertions, 0 deletions
diff --git a/src/mainboard/via/vt8454c/Options.lb b/src/mainboard/via/vt8454c/Options.lb index 8efc519ce5..a8dfd0b6a6 100644 --- a/src/mainboard/via/vt8454c/Options.lb +++ b/src/mainboard/via/vt8454c/Options.lb @@ -25,6 +25,9 @@ uses IRQ_SLOT_COUNT uses HAVE_ACPI_TABLES uses HAVE_OPTION_TABLE uses USE_OPTION_TABLE +uses HAVE_LOW_TABLES +uses HAVE_HIGH_TABLES +uses HAVE_MAINBOARD_RESOURCES uses USE_FALLBACK_IMAGE uses HAVE_FALLBACK_BOOT @@ -139,6 +142,13 @@ default HAVE_ACPI_TABLES=1 ## default HAVE_OPTION_TABLE=1 +## +## Build code to fill in tables both in low and high memory +## +default HAVE_LOW_TABLES=1 +default HAVE_HIGH_TABLES=1 +default HAVE_MAINBOARD_RESOURCES=1 + ## ## Build code to setup a generic IOAPIC diff --git a/src/mainboard/via/vt8454c/mainboard.c b/src/mainboard/via/vt8454c/mainboard.c index e931ccdafb..359fa30c4c 100644 --- a/src/mainboard/via/vt8454c/mainboard.c +++ b/src/mainboard/via/vt8454c/mainboard.c @@ -20,8 +20,23 @@ */ #include <device/device.h> +#include <boot/tables.h> +#include <console/console.h> #include "chip.h" +/* in arch/i386/boot/tables.c */ +extern uint64_t high_tables_base, high_tables_size; + +int add_mainboard_resources(struct lb_memory *mem) +{ +#if HAVE_HIGH_TABLES == 1 + printk_debug("Adding high table area\n"); + lb_add_memory_range(mem, LB_MEM_TABLE, + high_tables_base, high_tables_size); +#endif + return 0; +} + struct chip_operations mainboard_ops = { CHIP_NAME("VIA VT8454c Mainboard") }; diff --git a/src/northbridge/via/cx700/northbridge.c b/src/northbridge/via/cx700/northbridge.c index dc0c667d10..11c98da2ca 100644 --- a/src/northbridge/via/cx700/northbridge.c +++ b/src/northbridge/via/cx700/northbridge.c @@ -87,6 +87,12 @@ static u32 find_pci_tolm(struct bus *bus) return tolm; } +#if HAVE_HIGH_TABLES==1 +/* maximum size of high tables in KB */ +#define HIGH_TABLES_SIZE 64 +extern uint64_t high_tables_base, high_tables_size; +#endif + static void pci_domain_set_resources(device_t dev) { device_t mc_dev; @@ -117,6 +123,12 @@ static void pci_domain_set_resources(device_t dev) else tomk = (((rambits << 6) - (4 << reg) - 1) * 1024); +#if HAVE_HIGH_TABLES == 1 + high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024; + high_tables_size = HIGH_TABLES_SIZE* 1024; + printk_debug("tom: %lx, high_tables_base: %llx, high_tables_size: %llx\n", tomk*1024, high_tables_base, high_tables_size); +#endif + /* Compute the top of Low memory */ tolmk = pci_tolm >> 10; if (tolmk >= tomk) { |