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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-07-13 09:44:43 +0300
committerMartin Roth <martinroth@google.com>2019-07-21 18:56:11 +0000
commite1559eb84f26ab2476512bf999282ccf94c7176c (patch)
treec1399187af52e69a9e3b47763a4f23a4a7d792d9
parent3a82e9b8a32b80edc5f21bb7f4dae4dcb1d047b2 (diff)
downloadcoreboot-e1559eb84f26ab2476512bf999282ccf94c7176c.tar.xz
soc/intel: Fix chip_info for PCH_DEV_PMC
Since PCH_DEVFN_PMC device is a PCI device that may be hidden from enumeration, use SA_DEVFN_ROOT instead to locate the SOC configuration. Change-Id: I4b5195827fb32ec1dbd0bd6c9e243f4f9a4775ca Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34327 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
-rw-r--r--src/soc/intel/cannonlake/finalize.c4
-rw-r--r--src/soc/intel/cannonlake/pmutil.c9
-rw-r--r--src/soc/intel/icelake/finalize.c4
-rw-r--r--src/soc/intel/icelake/pmutil.c8
4 files changed, 4 insertions, 21 deletions
diff --git a/src/soc/intel/cannonlake/finalize.c b/src/soc/intel/cannonlake/finalize.c
index d099d7779a..6083cab010 100644
--- a/src/soc/intel/cannonlake/finalize.c
+++ b/src/soc/intel/cannonlake/finalize.c
@@ -56,7 +56,6 @@ static void pch_handle_sideband(config_t *config)
static void pch_finalize(void)
{
- struct device *dev;
uint32_t reg32;
uint8_t *pmcbase;
config_t *config;
@@ -74,8 +73,7 @@ static void pch_finalize(void)
* point and hence removed from the root bus. pcidev_path_on_root thus
* returns NULL for PCH_DEV_PMC device.
*/
- dev = SA_DEV_ROOT;
- config = dev->chip_info;
+ config = config_of_path(SA_DEVFN_ROOT);
pmcbase = pmc_mmio_regs();
if (config->PmTimerDisabled) {
reg8 = read8(pmcbase + PCH_PWRM_ACPI_TMR_CTL);
diff --git a/src/soc/intel/cannonlake/pmutil.c b/src/soc/intel/cannonlake/pmutil.c
index 9997d164e4..1626e300d8 100644
--- a/src/soc/intel/cannonlake/pmutil.c
+++ b/src/soc/intel/cannonlake/pmutil.c
@@ -175,14 +175,7 @@ uintptr_t soc_read_pmc_base(void)
void soc_get_gpi_gpe_configs(uint8_t *dw0, uint8_t *dw1, uint8_t *dw2)
{
DEVTREE_CONST struct soc_intel_cannonlake_config *config;
-
- /* Look up the device in devicetree */
- DEVTREE_CONST struct device *dev = pcidev_path_on_root(PCH_DEVFN_PMC);
- if (!dev || !dev->chip_info) {
- printk(BIOS_ERR, "BUG! Could not find SOC devicetree config\n");
- return;
- }
- config = dev->chip_info;
+ config = config_of_path(SA_DEVFN_ROOT);
/* Assign to out variable */
*dw0 = config->gpe0_dw0;
diff --git a/src/soc/intel/icelake/finalize.c b/src/soc/intel/icelake/finalize.c
index e035c958df..c969f3b6e8 100644
--- a/src/soc/intel/icelake/finalize.c
+++ b/src/soc/intel/icelake/finalize.c
@@ -54,7 +54,6 @@ static void pch_handle_sideband(config_t *config)
static void pch_finalize(void)
{
- struct device *dev;
uint32_t reg32;
uint8_t *pmcbase;
config_t *config;
@@ -74,8 +73,7 @@ static void pch_finalize(void)
* point and hence removed from the root bus. pcidev_path_on_root thus
* returns NULL for PCH_DEV_PMC device.
*/
- dev = SA_DEV_ROOT;
- config = dev->chip_info;
+ config = config_of_path(SA_DEVFN_ROOT);
pmcbase = pmc_mmio_regs();
if (config->PmTimerDisabled) {
reg8 = read8(pmcbase + PCH_PWRM_ACPI_TMR_CTL);
diff --git a/src/soc/intel/icelake/pmutil.c b/src/soc/intel/icelake/pmutil.c
index 45f2a70d7c..a70840b527 100644
--- a/src/soc/intel/icelake/pmutil.c
+++ b/src/soc/intel/icelake/pmutil.c
@@ -174,13 +174,7 @@ void soc_get_gpi_gpe_configs(uint8_t *dw0, uint8_t *dw1, uint8_t *dw2)
{
DEVTREE_CONST struct soc_intel_icelake_config *config;
- /* Look up the device in devicetree */
- DEVTREE_CONST struct device *dev = pcidev_path_on_root(PCH_DEVFN_PMC);
- if (!dev || !dev->chip_info) {
- printk(BIOS_ERR, "BUG! Could not find SOC devicetree config\n");
- return;
- }
- config = dev->chip_info;
+ config = config_of_path(SA_DEVFN_ROOT);
/* Assign to out variable */
*dw0 = config->gpe0_dw0;