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authorKarthikeyan Ramasubramanian <kramasub@google.com>2021-02-09 15:05:17 -0700
committerPatrick Georgi <pgeorgi@google.com>2021-02-12 07:48:54 +0000
commite49dfb6c447f07f44e217c783accea39661cf44a (patch)
tree1228264db3b47ded61a47c624e3bcc994506f91e
parent6bcaf6f9083904d0ff0e2dd0512903867fe9cc10 (diff)
downloadcoreboot-e49dfb6c447f07f44e217c783accea39661cf44a.tar.xz
mb/razer/blade_stealth_kbl: Configure IRQs as level triggered for HID over I2C
As per HID over I2C Protocol Specification[1] Version 1.00 Section 7.4, the interrupt line used by the device is required to be level triggered. Hence, this change updates the configuration of the HID over I2C devices to be level triggered. References: [1] http://download.microsoft.com/download/7/d/d/7dd44bb7-2a7a-4505-ac1c-7227d3d96d5b/hid-over-i2c-protocol-spec-v1-0.docx BUG=b:172846122 TEST=./util/abuild/abuild Change-Id: Ifdc3f061d919c8db9001c7a4cc26eb21117958d7 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50453 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-by: Furquan Shaikh <furquan@google.com>
-rw-r--r--src/mainboard/razer/blade_stealth_kbl/devicetree.cb2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/razer/blade_stealth_kbl/devicetree.cb b/src/mainboard/razer/blade_stealth_kbl/devicetree.cb
index 44b352359d..a358fb8374 100644
--- a/src/mainboard/razer/blade_stealth_kbl/devicetree.cb
+++ b/src/mainboard/razer/blade_stealth_kbl/devicetree.cb
@@ -191,7 +191,7 @@ chip soc/intel/skylake
chip drivers/i2c/hid
register "generic.hid" = ""PNP0C50""
register "generic.desc" = ""Synaptics Touchpad""
- register "generic.irq" = "ACPI_IRQ_WAKE_EDGE_LOW(GPP_E7_IRQ)"
+ register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_E7_IRQ)"
register "generic.probed" = "1"
register "hid_desc_reg_offset" = "0x20"
device i2c 0x2c on end