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authorStephan Guilloux <stephan.guilloux@free.fr>2009-04-19 23:24:26 +0000
committerPeter Stuge <peter@stuge.se>2009-04-19 23:24:26 +0000
commitf5f0c69628a23171079445aeb21ee39b7d1a4d92 (patch)
tree6bc42e80b89f8289ca3bce9357192bbecf3304f4
parent15bbfb84180484432c51b7c879bf525bd0e43211 (diff)
downloadcoreboot-f5f0c69628a23171079445aeb21ee39b7d1a4d92.tar.xz
flashrom: MX25L1605 and 1635 accept Chip Erase opcodes 60 and C7
Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4139 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--util/flashrom/flashchips.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/util/flashrom/flashchips.c b/util/flashrom/flashchips.c
index 0345959bb0..a3b0baab38 100644
--- a/util/flashrom/flashchips.c
+++ b/util/flashrom/flashchips.c
@@ -806,7 +806,7 @@ struct flashchip flashchips[] = {
.page_size = 256,
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
- .erase = spi_chip_erase_c7,
+ .erase = spi_chip_erase_60_c7,
.write = spi_chip_write,
.read = spi_chip_read,
},
@@ -820,7 +820,7 @@ struct flashchip flashchips[] = {
.page_size = 256,
.tested = TEST_UNTESTED,
.probe = probe_spi_rdid,
- .erase = spi_chip_erase_c7,
+ .erase = spi_chip_erase_60_c7,
.write = spi_chip_write,
.read = spi_chip_read,
},