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authorDuncan Laurie <dlaurie@google.com>2018-12-08 11:58:32 -0800
committerPatrick Georgi <pgeorgi@google.com>2018-12-10 08:53:16 +0000
commitf63c3f6448ccff7236fa121308a3efb337245e27 (patch)
treeb5979b5d337e65239a0f0212748e24dd1228e3ac
parentc81f0b6433d971e0e2012e1b4cd363e0799bc6d5 (diff)
downloadcoreboot-f63c3f6448ccff7236fa121308a3efb337245e27.tar.xz
soc/intel/cannonlake: Fix GPIO reporting
The kernel GPIO driver only expects some GPIO communities to be exported in the _CRS and it will not work correctly if the other communities are exported. CNL-LP: GPIO communities 0, 1, 4 CNL-H: GPIO communities 0, 1, 3, 4 Additionally one of the pin offset values was incorrect in GPIO community 1 for CNL-LP. This doesn't have any specific failure mode but it was found when auditing the GPIO code. Details of the kernel expected map can be found in the linux kernel at drivers/pinctrl/intel/pinctrl-cannonlake.c BUG=b:120686247 TEST=check /sys/kernel/debug/pinctrl/INT34BB:00/pins to ensure that pins >= 198 are not reading all zeros for the pin config registers. Change-Id: Ie1a2f3b9f9f4b24a9fc57e468dee50e99753912f Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/c/30112 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
-rw-r--r--src/soc/intel/cannonlake/acpi/gpio.asl20
-rw-r--r--src/soc/intel/cannonlake/acpi/gpio_cnp_h.asl13
-rw-r--r--src/soc/intel/cannonlake/gpio.c2
3 files changed, 11 insertions, 24 deletions
diff --git a/src/soc/intel/cannonlake/acpi/gpio.asl b/src/soc/intel/cannonlake/acpi/gpio.asl
index 8a990b3c61..e05cb68642 100644
--- a/src/soc/intel/cannonlake/acpi/gpio.asl
+++ b/src/soc/intel/cannonlake/acpi/gpio.asl
@@ -28,13 +28,16 @@ Device (GPIO)
{
Memory32Fixed (ReadWrite, 0, 0, COM0)
Memory32Fixed (ReadWrite, 0, 0, COM1)
- Memory32Fixed (ReadWrite, 0, 0, COM2)
- Memory32Fixed (ReadWrite, 0, 0, COM3)
Memory32Fixed (ReadWrite, 0, 0, COM4)
Interrupt (ResourceConsumer, Level, ActiveLow, Shared,,, GIRQ)
{ GPIO_IRQ14 }
})
+ /*
+ * GPIO communities 0, 1, and 4 are exported for the OS.
+ * This is based on the Linux kernel provided community map at
+ * drivers/pinctrl/intel/pinctrl-cannonlake.c:cnllp_communities[]
+ */
Method (_CRS, 0, NotSerialized)
{
/* GPIO Community 0 */
@@ -49,19 +52,6 @@ Device (GPIO)
Store (^^PCRB (PID_GPIOCOM1), BAS1)
Store (GPIO_BASE_SIZE, LEN1)
- /* GPIO Community 2 */
- CreateDWordField (^RBUF, ^COM2._BAS, BAS2)
- CreateDWordField (^RBUF, ^COM2._LEN, LEN2)
- Store (^^PCRB (PID_GPIOCOM2), BAS2)
- Store (GPIO_BASE_SIZE, LEN2)
-
- /* GPIO Community 3 */
- CreateDWordField (^RBUF, ^COM3._BAS, BAS3)
- CreateDWordField (^RBUF, ^COM3._LEN, LEN3)
- Store (^^PCRB (PID_GPIOCOM3), BAS3)
- Store (GPIO_BASE_SIZE, LEN3)
-
-
/* GPIO Community 4 */
CreateDWordField (^RBUF, ^COM4._BAS, BAS4)
CreateDWordField (^RBUF, ^COM4._LEN, LEN4)
diff --git a/src/soc/intel/cannonlake/acpi/gpio_cnp_h.asl b/src/soc/intel/cannonlake/acpi/gpio_cnp_h.asl
index 6e6eccf361..e872b09dd0 100644
--- a/src/soc/intel/cannonlake/acpi/gpio_cnp_h.asl
+++ b/src/soc/intel/cannonlake/acpi/gpio_cnp_h.asl
@@ -27,13 +27,17 @@ Device (GPIO)
{
Memory32Fixed (ReadWrite, 0, 0, COM0)
Memory32Fixed (ReadWrite, 0, 0, COM1)
- Memory32Fixed (ReadWrite, 0, 0, COM2)
Memory32Fixed (ReadWrite, 0, 0, COM3)
Memory32Fixed (ReadWrite, 0, 0, COM4)
Interrupt (ResourceConsumer, Level, ActiveLow, Shared,,, GIRQ)
{ GPIO_IRQ14 }
})
+ /*
+ * GPIO communities 0, 1, 3, and 4 are exported for the OS.
+ * This is based on the Linux kernel provided community map at
+ * drivers/pinctrl/intel/pinctrl-cannonlake.c:cnhl_communities[]
+ */
Method (_CRS, 0, NotSerialized)
{
/* GPIO Community 0 */
@@ -48,19 +52,12 @@ Device (GPIO)
Store (^^PCRB (PID_GPIOCOM1), BAS1)
Store (GPIO_BASE_SIZE, LEN1)
- /* GPIO Community 2 */
- CreateDWordField (^RBUF, ^COM2._BAS, BAS2)
- CreateDWordField (^RBUF, ^COM2._LEN, LEN2)
- Store (^^PCRB (PID_GPIOCOM2), BAS2)
- Store (GPIO_BASE_SIZE, LEN2)
-
/* GPIO Community 3 */
CreateDWordField (^RBUF, ^COM3._BAS, BAS3)
CreateDWordField (^RBUF, ^COM3._LEN, LEN3)
Store (^^PCRB (PID_GPIOCOM3), BAS3)
Store (GPIO_BASE_SIZE, LEN3)
-
/* GPIO Community 4 */
CreateDWordField (^RBUF, ^COM4._BAS, BAS4)
CreateDWordField (^RBUF, ^COM4._LEN, LEN4)
diff --git a/src/soc/intel/cannonlake/gpio.c b/src/soc/intel/cannonlake/gpio.c
index 0befba0b02..2705bcf144 100644
--- a/src/soc/intel/cannonlake/gpio.c
+++ b/src/soc/intel/cannonlake/gpio.c
@@ -43,7 +43,7 @@ static const struct pad_group cnl_community1_groups[] = {
INTEL_GPP(GPP_D0, GPP_D0, GPIO_RSVD_12), /* GPP_D */
INTEL_GPP(GPP_D0, GPP_F0, GPP_F23), /* GPP_F */
INTEL_GPP(GPP_D0, GPP_H0, GPP_H23), /* GPP_H */
- INTEL_GPP(GPP_D0, GPIO_RSVD_12, GPIO_RSVD_52), /* VGPIO */
+ INTEL_GPP(GPP_D0, GPIO_RSVD_13, GPIO_RSVD_52), /* VGPIO */
};
static const struct pad_group cnl_community2_groups[] = {