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authorBruce Griffith <Bruce.Griffith@se-eng.com>2014-12-05 19:38:53 -0700
committerBruce Griffith <Bruce.Griffith@se-eng.com>2014-12-19 18:44:24 +0100
commit5e2053ea82c3efec3755e0bd62bb67a4aaf7242e (patch)
tree932d0a5d751f20312fd6adf9ace23f9a9872cb4e /COPYING
parentd630c133e39fec87ecbcc1891aea3bd424bb1ea1 (diff)
downloadcoreboot-5e2053ea82c3efec3755e0bd62bb67a4aaf7242e.tar.xz
AMD 00730F01: Change Makefile to use BLOB sizes for packing
The new AMD PSP and SMU BLOBs currently have fixed sizes in the southbridge Makefile. Future PSP and SMU updates may require more space and thereby cause the make to fail with cryptic error messages. Change the makefile to compute CBFS locations and the corresponding PSP pointer table entry values based on the actual file sizes. Additionally, the FWM directory has expanded to 4096 bytes. The Avalon makefile is modified to zero-pad the FWM directory using the "dd" system command. There is dead code in the makefile to allow hardware validated boot ROMs, but the option is hard-coded to be disabled. Remove the HVB dead code. Change-Id: I4705cede8ed001a71bb4f49598444255c9609d52 Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Reviewed-on: http://review.coreboot.org/7726 Reviewed-by: Marshall Dawson <marshall.dawson@se-eng.com> Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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