diff options
author | Lee Leahy <leroy.p.leahy@intel.com> | 2016-06-18 18:52:43 -0700 |
---|---|---|
committer | Lee Leahy <leroy.p.leahy@intel.com> | 2016-07-08 17:59:20 +0200 |
commit | dc542702108fc80997f074978ac404c83ee0e9bf (patch) | |
tree | a25026af01a13f461e29c8a01848f617d7580ae3 /Documentation/Intel/Board/Galileo_checklist.html | |
parent | 5d94c2665360aad315b494b9ed47ed7f33a695a5 (diff) | |
download | coreboot-dc542702108fc80997f074978ac404c83ee0e9bf.tar.xz |
soc/intel/quark: Pass in the memory initialization parameters
Specify the memory initialization parameters in
mainboard/intel/galileo/devicetree.cb. Pass these values into FSP to
initialize memory.
TEST=Build and run on Galileo Gen2
Change-Id: I83ee196f5fb825118a3a74b61f73f3728a1a1dc6
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15260
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'Documentation/Intel/Board/Galileo_checklist.html')
-rw-r--r-- | Documentation/Intel/Board/Galileo_checklist.html | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/Documentation/Intel/Board/Galileo_checklist.html b/Documentation/Intel/Board/Galileo_checklist.html index ba1469b36b..3fc04b18ce 100644 --- a/Documentation/Intel/Board/Galileo_checklist.html +++ b/Documentation/Intel/Board/Galileo_checklist.html @@ -3,7 +3,7 @@ <title>Galileo Implementation Status</title> </title> <body> -<h1>Galileo Implementation Status<br>2016/06/08 17:18:24 PDT</h1> +<h1>Galileo Implementation Status<br>2016/07/08 06:51:34 PDT</h1> <table> <tr><td colspan=2><b>Legend</b></td></tr> <tr><td bgcolor="#ffc0c0">Red</td><td>Required - To-be-implemented</td></tr> @@ -31,7 +31,7 @@ <td width=5> </td> <td> <table border=1> -<tr><th colspan=2>romstage: 66% Done</th></tr> +<tr><th colspan=2>romstage: 67% Done</th></tr> <tr><th>Type</th><th>Routine</td></tr> <tr bgcolor=#ffffc0><td>Optional</td><td>arch_segment_loaded</td></tr> <tr bgcolor=#ffffc0><td>Optional</td><td>backup_top_of_ram</td></tr> @@ -78,7 +78,7 @@ <tr bgcolor=#ffc0c0><td>Required</td><td>smm_region</td></tr> <tr bgcolor=#ffc0c0><td>Required</td><td>smm_region_size</td></tr> <tr bgcolor=#c0ffc0><td>Required</td><td>soc_after_ram_init</td></tr> -<tr bgcolor=#ffffc0><td>Optional</td><td>soc_display_memory_init_params</td></tr> +<tr bgcolor=#c0ffc0><td>Required</td><td>soc_display_memory_init_params</td></tr> <tr bgcolor=#c0ffc0><td>Required</td><td>soc_display_mtrrs</td></tr> <tr bgcolor=#c0ffc0><td>Required</td><td>soc_get_variable_mtrr_count</td></tr> <tr bgcolor=#c0ffc0><td>Required</td><td>soc_memory_init_params</td></tr> @@ -98,7 +98,7 @@ <td width=5> </td> <td> <table border=1> -<tr><th colspan=2>ramstage: 55% Done</th></tr> +<tr><th colspan=2>ramstage: 60% Done</th></tr> <tr><th>Type</th><th>Routine</td></tr> <tr bgcolor=#ffc0c0><td>Required</td><td>acpi_create_serialio_ssdt</td></tr> <tr bgcolor=#ffffc0><td>Optional</td><td>arch_segment_loaded</td></tr> @@ -138,7 +138,7 @@ <tr bgcolor=#c0ffc0><td>Required</td><td>smbios_mainboard_version</td></tr> <tr bgcolor=#ffffc0><td>Optional</td><td>smm_disable_busmaster</td></tr> <tr bgcolor=#ffffc0><td>Optional</td><td>soc_after_silicon_init</td></tr> -<tr bgcolor=#ffffc0><td>Optional</td><td>soc_display_silicon_init_params</td></tr> +<tr bgcolor=#c0ffc0><td>Required</td><td>soc_display_silicon_init_params</td></tr> <tr bgcolor=#ffc0c0><td>Required</td><td>soc_fill_acpi_wake</td></tr> <tr bgcolor=#c0ffc0><td>Required</td><td>soc_silicon_init_params</td></tr> <tr bgcolor=#ffffc0><td>Optional</td><td>soc_skip_ucode_update</td></tr> |