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| author | Martin Roth <martinroth@google.com> | 2017-06-03 20:16:01 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-06-12 04:06:40 +0200 |
| commit | 4b18a922f0ab597fc010beeef01cee332fd48705 (patch) | |
| tree | 6f1645f1f8464f1037449ae991c08d257784b444 /Documentation/Intel/SoC | |
| parent | 1318ea600b348cff43a66ffa6296a552b59e8888 (diff) | |
| download | coreboot-4b18a922f0ab597fc010beeef01cee332fd48705.tar.xz | |
Documentation: change coreboot to lowercase
The word 'coreboot' should always be written in lowercase, even at the
start of a sentence.
Unfortunately, some external websites and projects are spelling coreboot
with an uppercase C, so references to those pages can't be changed
without breaking the link.
Change-Id: I79824da8a9ed36a1e4fe23a1711a89535267bf5f
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20031
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'Documentation/Intel/SoC')
| -rw-r--r-- | Documentation/Intel/SoC/soc.html | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/Intel/SoC/soc.html b/Documentation/Intel/SoC/soc.html index 6f6d6308ab..147b0a1a8e 100644 --- a/Documentation/Intel/SoC/soc.html +++ b/Documentation/Intel/SoC/soc.html @@ -588,7 +588,7 @@ Use the following steps to debug the call to TempRamInit: </p> <table border="1"> <tr bgcolor="#c0ffc0"> - <td>Coreboot Field</td> + <td>coreboot Field</td> <td>EDK2 Field</td> <td>gUefiAcpiBoardInfoGuid</td> <td>Use</li> |