diff options
| author | Lee Leahy <leroy.p.leahy@intel.com> | 2016-01-31 11:48:15 -0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-02-05 22:53:11 +0100 |
| commit | 7e0078b990b7b498391505fb5c492ff7ed8e54cb (patch) | |
| tree | c256d127efd4c6af26701addeda6aa67dad717c1 /Documentation/Intel/fsp1_1.html | |
| parent | a1e4de47c6775acfc6ed692a8875e94db85a5834 (diff) | |
| download | coreboot-7e0078b990b7b498391505fb5c492ff7ed8e54cb.tar.xz | |
Documentation: Add the x86 FSP Binary
Document how to add the FSP binary to the SPI flash image.
TEST=None
Change-Id: I51b16600ea69853240282ac2eb0d84935b8e2a71
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/13442
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'Documentation/Intel/fsp1_1.html')
| -rw-r--r-- | Documentation/Intel/fsp1_1.html | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/Documentation/Intel/fsp1_1.html b/Documentation/Intel/fsp1_1.html index e08be830ff..456db802a8 100644 --- a/Documentation/Intel/fsp1_1.html +++ b/Documentation/Intel/fsp1_1.html @@ -14,6 +14,7 @@ </p> <ol> <li><a href="#RequiredFiles">Required Files</a></li> + <li>Add the <a href="#FspBinary">FSP Binary File</a> to the coreboot File System</li> </ol> <p> @@ -45,6 +46,18 @@ <hr> +<h1><a name="FspBinary">Add the FSP Binary File to coreboot File System</a></h1> +<p> + Add the FSP binary to the coreboot flash image using the following command: +</p> +<pre><code>util/cbfstool/cbfstool build/coreboot.rom add -t fsp -n fsp.bin -b <base address> -f fsp.bin</code></pre> +<p> + This command relocates the FSP binary to the 4K byte aligned location in CBFS so that the + FSP code for TempRamInit may be executed in place. +</p> + + +<hr> <p>Modified: 31 January 2016</p> </body> </html>
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