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authorFurquan Shaikh <furquan@chromium.org>2017-03-20 10:53:57 -0700
committerFurquan Shaikh <furquan@google.com>2017-03-21 22:35:06 +0100
commit8110223989b34675c949465663c7ebfd5eb10155 (patch)
tree9a114187a73feec17c1552d39823ce6870ad5abc /Documentation/Intel
parentbb5e77c4787c7bbf079d084087143c5ca85fdcc3 (diff)
downloadcoreboot-8110223989b34675c949465663c7ebfd5eb10155.tar.xz
mainboard/google/poppy: Use sideband IRQ for SD Card Detect
Since SD card controller is expected to enter D3hot by runtime power management if there is no card inserted, we need to use a sideband IRQ pin which is not under the control of the controller. Thus, configure GPP_A7 as the sideband IRQ pin and pass it to OS as the card detect pin. BUG=b:35586693 BRANCH=None TEST=Verified on a reworked poppy board that card detect works fine. Change-Id: I4512f5d7829583e27c9750463396eaffbc5702b4 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/18926 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
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