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authorArthur Heymans <arthur@aheymans.xyz>2019-11-01 21:53:36 +0100
committerNico Huber <nico.h@gmx.de>2019-11-10 11:46:10 +0000
commit55069d15d8a6dcd7f8eaaf36e85e5d7a53fdaae6 (patch)
tree3ce7924b9a242256086daf771e6b2f7327cf9df5 /Documentation/arch
parent7f22933e98ec70b31b939b2ab70d6b8715640848 (diff)
downloadcoreboot-55069d15d8a6dcd7f8eaaf36e85e5d7a53fdaae6.tar.xz
arch/riscv: Pass cbmem_top to ramstage via calling argument
Tested on the Qemu-Virt target both 32 and 64 bit. Change-Id: I5c74cd5d3ee292931c5bbd2e4075f88381429f72 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36558 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation/arch')
-rw-r--r--Documentation/arch/riscv/index.md3
1 files changed, 3 insertions, 0 deletions
diff --git a/Documentation/arch/riscv/index.md b/Documentation/arch/riscv/index.md
index ea6a5cd47e..e0d37f591c 100644
--- a/Documentation/arch/riscv/index.md
+++ b/Documentation/arch/riscv/index.md
@@ -19,6 +19,9 @@ On entry to a stage or payload (including SELF payloads),
* all harts are running.
* A0 is the hart ID.
* A1 is the pointer to the Flattened Device Tree (FDT).
+* A2 contains the additional program calling argument:
+ - cbmem_top for ramstage
+ - the address of the payload for opensbi
## Additional payload handoff requirements
The location of cbmem should be placed in a node in the FDT.