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| author | Julius Werner <jwerner@chromium.org> | 2019-08-16 15:35:39 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-20 10:10:48 +0000 |
| commit | f96d9051c2b39544300d35f64ce92502e1e230c0 (patch) | |
| tree | 141966be0dedd056261528e55e05efde4b20b56d /Documentation/contributing | |
| parent | 63c444a69b98bc8a86719699423b3273cc5759e8 (diff) | |
| download | coreboot-f96d9051c2b39544300d35f64ce92502e1e230c0.tar.xz | |
Remove MIPS architecture
The MIPS architecture port has been added 5+ years ago in order to
support a Chrome OS project that ended up going nowhere. No other board
has used it since and nobody is still willing or has the expertise and
hardware to maintain it. We have decided that it has become too much of
a mainenance burden and the chance of anyone ever reviving it seems too
slim at this point. This patch eliminates all MIPS code and
MIPS-specific hacks.
Change-Id: I5e49451cd055bbab0a15dcae5f53e0172e6e2ebe
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34919
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation/contributing')
| -rw-r--r-- | Documentation/contributing/project_ideas.md | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/contributing/project_ideas.md b/Documentation/contributing/project_ideas.md index 21a756d99a..5bc4cacea5 100644 --- a/Documentation/contributing/project_ideas.md +++ b/Documentation/contributing/project_ideas.md @@ -64,7 +64,7 @@ across architectures. ### Mentors * Timothy Pearson <tpearson@raptorengineering.com> -## Support QEMU AArch64 or MIPS +## Support QEMU AArch64 Having QEMU support for the architectures coreboot can boot helps with some (limited) compatibility testing: While QEMU generally doesn't need much hardware init, any CPU state changes in the boot flow will likely @@ -105,7 +105,7 @@ would help to ensure code quality and make the runtime code more robust. ### Mentors * Werner Zeh <werner.zeh@gmx.net> -## Port payloads to ARM, AArch64, MIPS or RISC-V +## Port payloads to ARM, AArch64 or RISC-V While we have a rather big set of payloads for x86 based platforms, all other architectures are rather limited. Improve the situation by porting a payload to one of the platforms, for example GRUB2, U-Boot (the UI part), Tianocore, |