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| author | Felix Held <felix-coreboot@felixheld.de> | 2020-08-28 02:09:29 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-08-31 06:43:05 +0000 |
| commit | bbed4d9ff0adf1914cf0af15dd430a7c91f638bd (patch) | |
| tree | cbe4ea199d428eb58428afffccf68876fb4a1b98 /Documentation/contributing | |
| parent | d555d6a88cf733f9f5a0a24694691a6901a81c73 (diff) | |
| download | coreboot-bbed4d9ff0adf1914cf0af15dd430a7c91f638bd.tar.xz | |
mb/amd/mandolin: move PCIe GPP clock setting to devicetree
Checked with the schematics that all PCIe clocks have a corresponding
clock enable pin.
BUG=b:149970243
BRANCH=zork
Change-Id: If96cdf95e213682217e46a98fc69c5c2ef4a148d
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44892
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation/contributing')
0 files changed, 0 insertions, 0 deletions