diff options
| author | Yu-Ping Wu <yupingso@chromium.org> | 2019-10-17 13:38:32 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-10-21 09:14:47 +0000 |
| commit | 46009ea4ccf861754290321936eb0fb7769ba772 (patch) | |
| tree | 77d7b8bce7ca3815f553b91f7201a0cf16658726 /Documentation/contributing | |
| parent | 998a3cc0dab5e73ae2a169aeb04df6b4db4f968a (diff) | |
| download | coreboot-46009ea4ccf861754290321936eb0fb7769ba772.tar.xz | |
soc/mediatek/mt8183: Force DRAM retraining if hotkey pressed
Similar to MRC cache on x86 platforms, when a hotkey is pressed during
boot, the calibration data cache saved in the flash will be cleared,
consequently triggering DRAM retraining (full calibration) in the next
boot.
BRANCH=kukui
BUG=b:139099592
TEST=emerge-kukui coreboot
Change-Id: I2f9225f359e1fe5733e8e1c48b396aaeeb9a58ab
Signed-off-by: Yu-Ping Wu <yupingso@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36090
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'Documentation/contributing')
0 files changed, 0 insertions, 0 deletions