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author | Daniel Maslowski <daniel.maslowski@img.ly> | 2019-06-06 12:46:49 +0200 |
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committer | Nico Huber <nico.h@gmx.de> | 2019-06-09 11:13:26 +0000 |
commit | 66bcc3101eed6a006fa70946ec7a0f520fe3697c (patch) | |
tree | 2d1cb62b46e9cb692aac4ec733715aae43385906 /Documentation/gfx/display-panel.md | |
parent | 45b137eab025bcd2efe3f8acaac2a1c856c1a76d (diff) | |
download | coreboot-66bcc3101eed6a006fa70946ec7a0f520fe3697c.tar.xz |
Documentation: Add display panel specifics
Change-Id: If1a393578556d51499c700b68187034830d19215
Signed-off-by: Daniel Maslowski <daniel.maslowski@img.ly>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33265
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'Documentation/gfx/display-panel.md')
-rw-r--r-- | Documentation/gfx/display-panel.md | 64 |
1 files changed, 64 insertions, 0 deletions
diff --git a/Documentation/gfx/display-panel.md b/Documentation/gfx/display-panel.md new file mode 100644 index 0000000000..3bab0896fd --- /dev/null +++ b/Documentation/gfx/display-panel.md @@ -0,0 +1,64 @@ +Display Panel Specifics +======================= + +Timing Parameters +----------------- + +From the binary file `edid` in the sys filesystem on Linux, the panel can be +identified. The exact path may differ slightly. Here is an example: + +```sh +$ strings /sys/devices/pci0000:00/0000:00:02.0/drm/card0/card0-eDP-1/edid +@0 5 +LG Display +LP140WF3-SPD1 +``` + +To figure out the timing parameters, refer to the [Intel Programmer's Reference +Manuals](https://01.org/linuxgraphics/documentation/hardware-specification-prms) +and try to find the datasheet of the panel using the information from `edid`. +In the example above, you would search for `LP140WF3-SPD1`. Find a table listing +the power sequence timing parameters, which are usually named T[N] and also +referenced in Intel's respective registers listing. You need the values for +`PP_ON_DELAYS`, `PP_OFF_DELAYS` and `PP_DIVISOR` for your `devicetree.cb`: + +```eval_rst ++-----------------------------+---------------------------------------+-----+ +| Intel docs | devicetree.cb | eDP | ++-----------------------------+---------------------------------------+-----+ +| Power up delay | `gpu_panel_power_up_delay` | T3 | ++-----------------------------+---------------------------------------+-----+ +| Power on to backlight on | `gpu_panel_power_backlight_on_delay` | T7 | ++-----------------------------+---------------------------------------+-----+ +| Power Down delay | `gpu_panel_power_down_delay` | T10 | ++-----------------------------+---------------------------------------+-----+ +| Backlight off to power down | `gpu_panel_power_backlight_off_delay` | T9 | ++-----------------------------+---------------------------------------+-----+ +| Power Cycle Delay | `gpu_panel_power_cycle_delay` | T12 | ++-----------------------------+---------------------------------------+-----+ +``` + +Intel GPU Tools and VBT +----------------------- + +The Intel GPU tools are in a package called either `intel-gpu-tools` or +`igt-gpu-tools` in most distributions of Linux-based operating systems. +In the coreboot `util/` directory, you can find `intelvbttool`. + +From a running system, you can dump the register values directly: +```sh +$ intel_reg dump --all | grep PCH_PP + PCH_PP_STATUS (0x000c7200): 0x80000008 + PCH_PP_CONTROL (0x000c7204): 0x00000007 + PCH_PP_ON_DELAYS (0x000c7208): 0x07d00001 + PCH_PP_OFF_DELAYS (0x000c720c): 0x01f40001 + PCH_PP_DIVISOR (0x000c7210): 0x0004af06 +``` + +You can obtain the timing values from a VBT (Video BIOS Table), which you can +dump from a vendor UEFI image: +```sh +$ intel_vbt_decode data.vbt | grep T3 + Power Sequence: T3 2000 T7 10 T9 2000 T10 500 T12 5000 + T3 optimization: no +``` |