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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-10-27 18:00:57 +0200 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-11-02 03:25:23 +0100 |
commit | 3b01cf17d28d895ed2eed52213ed2f590f976567 (patch) | |
tree | c28850a2117f0554949ce66f9082441be7da6589 /Documentation/hypertransport.svg | |
parent | 70460249fd9b4c35d4f844aa6491e7f6def31c42 (diff) | |
download | coreboot-3b01cf17d28d895ed2eed52213ed2f590f976567.tar.xz |
superio/nuvoton/nct5572d: Add missing logical devices
While the actual pins behind these devices are not exposed on the chip,
the enable registers are implemented in hardware. Allow to turn these LDNs
off, like the vendor bios for asrock/e350m1 does.
Change-Id: I4d6d5a8de12b09095138cacbad62b2dfbbe54028
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/12213
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'Documentation/hypertransport.svg')
0 files changed, 0 insertions, 0 deletions