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| author | Christian Walter <christian.walter@9elements.com> | 2019-05-10 15:52:00 +0200 |
|---|---|---|
| committer | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2019-09-01 22:18:38 +0000 |
| commit | 08aa502d79d04a13c56293021cd66d9c3c270f97 (patch) | |
| tree | b7e45ac6f88d2db3e0d5a31af989d6708574bcff /Documentation/mainboard/supermicro | |
| parent | fad9536edf408718ddbc65c664652b6c01267568 (diff) | |
| download | coreboot-08aa502d79d04a13c56293021cd66d9c3c270f97.tar.xz | |
mb/supermicro/x11ssh: Add Supermicro X11SSH-TF
Add support for the X11SSH-TF which is based on Intel KBL.
Working:
* SeaBIOS payload
* LinuxBoot payload
* IPMI of BMC
* PCIe, SATA, USB and M.2 ports
* RS232 serial
* Native graphics init
Not working:
* TianoCore doesn't work yet as the Aspeed NGI is text mode only.
* Intel SGX, due to random crashes in soc/intel/common
For more details have a look at the documentation.
Please apply those patches as well for good user experience:
Ica0c20255f661dd61edc3a7d15646b7447c4658e
Signed-off-by: Christian Walter <christian.walter@9elements.com>
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Signed-off-by: Felix Singer <felix.singer@9elements.com>
Change-Id: I2edaa4a928de3a065e517c0f20e3302b4b702323
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32734
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Diffstat (limited to 'Documentation/mainboard/supermicro')
| -rw-r--r-- | Documentation/mainboard/supermicro/x11ssh-tf.md | 74 | ||||
| -rw-r--r-- | Documentation/mainboard/supermicro/x11ssh_flash.jpg | bin | 0 -> 138435 bytes |
2 files changed, 74 insertions, 0 deletions
diff --git a/Documentation/mainboard/supermicro/x11ssh-tf.md b/Documentation/mainboard/supermicro/x11ssh-tf.md new file mode 100644 index 0000000000..a9dc838906 --- /dev/null +++ b/Documentation/mainboard/supermicro/x11ssh-tf.md @@ -0,0 +1,74 @@ +# Supermicro X11SSH-TF + +This section details how to run coreboot on the [Supermicro X11SSH-TF]. + +## Required proprietary blobs + +* [Intel FSP2.0] +* Intel ME + +## Flashing coreboot + +The board can be flashed externally using *some* programmers. +The CH341 was found working, while Dediprog won't detect the chip. + +For more details have a look at the [flashing tutorial]. + +The flash IC can be found between the two PCIe slots near the southbridge: + + +## BMC (IPMI) + +This board has an ASPEED [AST2400], which has BMC functionality. The +BMC firmware resides in a 32 MiB SOIC-16 chip in the corner of the +mainboard near the [AST2400]. This chip is an [MX25L25635F]. + +## Known issues + +- Intel SGX causes secondary APs to crash (disabled for now). +- Tianocore doesn't work with Aspeed NGI, as it's text mode only. +- After S5 resume coreboot detects more DIMMs than installed, causing FSP-M + to fail. + +## Tested and working + +- USB ports +- M.2 2280 NVMe slot +- 2x 10GB Ethernet +- SATA +- RS232 +- VGA on Aspeed +- Super I/O initialisation +- ECC DRAM detection +- PCIe slots +- TPM on TPM expansion header +- BMC (IPMI) + +## Technology + +```eval_rst ++------------------+--------------------------------------------------+ +| CPU | Intel Kaby Lake | ++------------------+--------------------------------------------------+ +| PCH | Intel C236 | ++------------------+--------------------------------------------------+ +| Super I/O | ASPEED AST2400 | ++------------------+--------------------------------------------------+ +| Coprocessor | Intel SPS (server version of the ME) | ++------------------+--------------------------------------------------+ +| Coprocessor | ASPEED AST2400 | ++------------------+--------------------------------------------------+ +``` + +## Extra links + +- [Board manual] + +[AST2400]: https://www.aspeedtech.com/products.php?fPath=20&rId=376 +[Board manual]: https://www.supermicro.com/manuals/motherboard/C236/MNL-1783.pdf +[flashrom]: https://flashrom.org/Flashrom +[MX25L25635F]: https://media.digikey.com/pdf/Data%20Sheets/Macronix/MX25L25635F.pdf +[N25Q128A]: https://www.micron.com/~/media/Documents/Products/Data%20Sheet/NOR%20Flash/Serial%20NOR/N25Q/n25q_128mb_3v_65nm.pdf +[flashing tutorial]: ../../flash_tutorial/ext_power.md +[Intel FSP2.0]: ../../soc/intel/fsp/index.md +[Supermicro X11SSH-TF]: https://www.supermicro.com/en/products/motherboard/X11SSH-TF diff --git a/Documentation/mainboard/supermicro/x11ssh_flash.jpg b/Documentation/mainboard/supermicro/x11ssh_flash.jpg Binary files differnew file mode 100644 index 0000000000..8ab07f23c7 --- /dev/null +++ b/Documentation/mainboard/supermicro/x11ssh_flash.jpg |
