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authorPatrick Rudolph <patrick.rudolph@9elements.com>2018-05-25 11:04:45 +0200
committerPhilipp Deppenwiese <zaolin.daisuki@gmail.com>2018-05-28 13:46:30 +0000
commitfacc08c47aded7002b1a867fb7dd67640f6e2830 (patch)
treea2115a10802edb51a0a3d48854ec56d854f2b7de /Documentation/mainboard
parent98376b84592aea85089f047957c39b3889136574 (diff)
downloadcoreboot-facc08c47aded7002b1a867fb7dd67640f6e2830.tar.xz
Documentation: Add HP Compaq 8200 and NPCD378
Change-Id: I56db0cc11cfa5a1a537091553393542312d4f212 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/26543 Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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diff --git a/Documentation/mainboard/hp/compaq_8200_sff.md b/Documentation/mainboard/hp/compaq_8200_sff.md
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+# HP Compaq 8200 Elite SFF
+
+This page describes how to run coreboot on the [Compaq 8200 Elite SFF] desktop
+from [HP].
+
+## TODO
+
+The following things are still missing from this coreboot port:
+
+- Extended HWM reporting
+- Advanced LED control
+- Advanced power configuration in S3
+
+## Flashing coreboot
+
+```eval_rst
++---------------------+------------+
+| Type | Value |
++=====================+============+
+| Socketed flash | no |
++---------------------+------------+
+| Model | MX25L6406E |
++---------------------+------------+
+| Size | 8 MiB |
++---------------------+------------+
+| In circuit flashing | yes |
++---------------------+------------+
+| Package | SOIC-8 |
++---------------------+------------+
+| Write protection | No |
++---------------------+------------+
+| Dual BIOS feature | No |
++---------------------+------------+
+| Internal flashing | yes |
++---------------------+------------+
+```
+
+### Internal programming
+
+The SPI flash can be accessed using [flashrom].
+
+### External programming
+
+External programming with an SPI adapter and [flashrom] does work, but it powers the
+whole southbridge complex. You need to supply enough current through the programming adapter.
+
+If you want to use a SOIC pomona test clip, you have to cut the 2nd DRAM DIMM holder,
+as otherwise there's not enough space near the flash.
+
+**Position of SOIC-8 flash IC near 2nd DIMM holder**
+![][compaq_8200_flash1]
+
+[compaq_8200_flash1]: compaq_8200_sff_flash1.jpg
+
+**Closeup view of SOIC-8 flash IC**
+![][compaq_8200_flash2]
+
+[compaq_8200_flash2]: compaq_8200_sff_flash2.jpg
+
+## Technology
+
+```eval_rst
++------------------+--------------------------------------+
+| Northbridge | Sandy Bridge |
++------------------+--------------------------------------+
+| Southbridge | bd82x6x |
++------------------+--------------------------------------+
+| CPU | model_206ax |
++------------------+--------------------------------------+
+| SuperIO | :doc:`../../superio/nuvoton/npcd378` |
++------------------+--------------------------------------+
+| EC | |
++------------------+--------------------------------------+
+| Coprocessor | Intel ME |
++------------------+--------------------------------------+
+```
+
+[Compaq 8200 Elite SFF]: https://support.hp.com/us-en/document/c03414707
+[HP]: https://www.hp.com/
+[flashrom]: https://flashrom.org/Flashrom
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diff --git a/Documentation/mainboard/index.md b/Documentation/mainboard/index.md
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+++ b/Documentation/mainboard/index.md
@@ -5,3 +5,7 @@ This section contains documentation about coreboot on specific mainboards.
## SiFive
- [SiFive HiFive Unleashed](sifive/hifive-unleashed.md)
+
+## HP
+
+- [Compaq 8200 Elite SFF](hp/compaq_8200_sff.md)