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authorFrans Hendriks <fhendriks@eltan.com>2019-07-15 08:48:55 +0200
committerMartin Roth <martinroth@google.com>2019-07-17 14:21:52 +0000
commited52e3dd9c33e5f714bde615e16c1b187cdd269f (patch)
treea19282a87dd1789b319ea0ac3612963148bb2983 /Documentation/mainboard
parent6feb4dadd85518c5e4603cb7da48ac4bec484c62 (diff)
downloadcoreboot-ed52e3dd9c33e5f714bde615e16c1b187cdd269f.tar.xz
mainboard/portwell/m107: Do initial mainboard commit
Initial support for Portwell PQ7-M107 (Q7) module. Code based on Intel Strago mainboard. BUG=N/A TEST=booting SeaBIOS and Linux 4.20 kernel on PQ7-M107 Change-Id: I7d3173fdcf881f894a75cd9798ba173b425d4e62 Signed-off-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/29470 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
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diff --git a/Documentation/mainboard/index.md b/Documentation/mainboard/index.md
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--- a/Documentation/mainboard/index.md
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@@ -69,6 +69,10 @@ The boards in this section are not real mainboards, but emulators.
- [T4xx common](lenovo/t4xx_series.md)
- [X2xx common](lenovo/x2xx_series.md)
+## Portwell
+
+- [PQ7-M107](portwell/pq7-m107.md)
+
### Sandy Bridge series
- [T420](lenovo/t420.md)
diff --git a/Documentation/mainboard/portwell/pq7-m107.md b/Documentation/mainboard/portwell/pq7-m107.md
new file mode 100644
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+++ b/Documentation/mainboard/portwell/pq7-m107.md
@@ -0,0 +1,79 @@
+# Portwell PQ7-M107
+
+This page describes how to run coreboot on the [Portwell PQ7-M107].
+
+PQ7-M107 are assembled with different onboard memory modules:
+ Rev 1.0 Onboard Samsung K4B8G1646D-MYKO memory
+ Rev 1.1 and 1.2 Onboard Micron MT41K512M16HA-125A memory
+
+Use 'make menuconfig' to configure `onboard memory manufacture` in Mainboard
+menu.
+
+## Required blobs
+
+This board currently requires:
+fsp blob 3rdparty/fsp/BraswellFspBinPkg/FspBin/BSWFSP.fd
+Microcode Intel Braswell cpuid 1046C4 version 410
+ (Used pre-built binary retrieved from Intel site)
+
+## Flashing coreboot
+
+### Internal programming
+
+The main SPI flash can be accessed using [flashrom].
+
+### External programming
+
+The system has an internal flash chip which is a 8 MiB soldered SOIC-8 chip.
+This chip is located on the top middle side of the board. It's located
+between SoC and Q7 connector. Use clip (or solder wires) to program
+the chip.
+Specifically, it's a Winbond W25Q64FW (1.8V), whose datasheet can be found
+[here][W25Q64FW].
+
+## Known issues
+
+- The PQ7 module contains Q7 connector only. Depending on the carrier
+serial/video/pcie ports might be available.
+
+## Untested
+
+- hardware monitor
+- SDIO
+- Full Embedded Controller support
+
+## Working (using carrier)
+
+- USB
+- Gigabit Ethernet
+- integrated graphics
+- flashrom
+- external graphics
+- PCIe
+- eMMC
+- SATA
+- serial port
+- SMbus
+- HDA (codec on carrier)
+- initialization with FSP MR2
+- SeaBIOS payload (version rel-1.11.0-44-g7961917)
+- Embedded Linux (Ubuntu 4.15+)
+
+## Technology
+
+```eval_rst
++------------------+--------------------------------------------------+
+| SoC | Intel Atom Processor N3710 |
++------------------+--------------------------------------------------+
+| CPU | Intel Braswell (N3710) |
++------------------+--------------------------------------------------+
+| Super I/O, EC | ITE8256 |
++------------------+--------------------------------------------------+
+| Coprocessor | Intel Management Engine |
++------------------+--------------------------------------------------+
+```
+
+[Portwell PQ7-M107]: http://portwell.com/products/detail.php?CUSTCHAR1=PQ7-M107
+[W25Q64FW]: https://www.winbond.com/resource-files/w25q64fw%20revn%2005182017%20sfdp.pdf
+[flashrom]: https://flashrom.org/Flashrom
+[Board manual]: www.portwell.com/pdf/embedded/PQ7-M107.pdf