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authorMichael Niewöhner <foss@mniewoehner.de>2019-09-18 16:31:50 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-09-26 09:29:25 +0000
commit0a6c62fbbe979b3363152ee8c5aace8a0a12871d (patch)
treef1194dff0876384276aa106d3cb2750d13254f9a /Documentation/mainboard
parentb68ebfa8fc925bd74aa601ad77fcf882f44ba8f5 (diff)
downloadcoreboot-0a6c62fbbe979b3363152ee8c5aace8a0a12871d.tar.xz
mb/supermicro: restructure x11ssh-tf to represent a x11 board series
Most of the X11 boards with socket LGA1151 are basically the same boards with just some minor differences like different NICs (1 GbE, 10 GbE), number of NICs / PCIe ports etc. There are about 20 boards that can be added, if there is a community for testing. To be able to add more x11 boards easily like x11ssm (see CB:35427) this restructures the x11ssh tree to represent a "X11 LGA1151 series". There were multiple suggestions for the structure like grouping by series (x10, x11, x...), grouping by chipset or by cpu family. It turned out that there are some "X11 series" boards that are completely different. Grouping by chipset or cpu family suffers from the same problem. This is why finally we agreed on grouping by series and socket ("X11 LGA1151 series"). The structure uses the common baseboard scheme, while there is no "real" baseboard we know of. By checking images, comparing logs etc. we came to the conclusion that Supermicro does have some base layout which is only modified a bit for the different boards. X11SSH-TF was moved to the variants/ folder with it's gpio.h. As we expect the other boards to have mostly the same device tree, there is a common devicetree that gets overridden by each variant's overridetree. Besides that some very minor modifications happened (formatting, fixing comments, ...) but not much. Documentation is reworked in CB:35547 Change-Id: I8dc4240ae042760a845e890b923ad40478bb8e29 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35426 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation/mainboard')
-rw-r--r--Documentation/mainboard/index.md2
-rw-r--r--Documentation/mainboard/supermicro/x11-lga1151-series/index.md7
-rw-r--r--Documentation/mainboard/supermicro/x11-lga1151-series/x11ssh-tf/x11ssh-tf.md (renamed from Documentation/mainboard/supermicro/x11ssh-tf.md)6
-rw-r--r--Documentation/mainboard/supermicro/x11-lga1151-series/x11ssh-tf/x11ssh-tf_flash.jpg (renamed from Documentation/mainboard/supermicro/x11ssh_flash.jpg)bin138435 -> 138435 bytes
4 files changed, 11 insertions, 4 deletions
diff --git a/Documentation/mainboard/index.md b/Documentation/mainboard/index.md
index 2745a7165d..ea476eb59f 100644
--- a/Documentation/mainboard/index.md
+++ b/Documentation/mainboard/index.md
@@ -108,7 +108,7 @@ The boards in this section are not real mainboards, but emulators.
## Supermicro
- [X10SLM+-F](supermicro/x10slm-f.md)
-- [X11SSH-TF](supermicro/x11ssh-tf.md)
+- [X11 LGA1151 series](supermicro/x11-lga1151-series/index.md)
## UP
diff --git a/Documentation/mainboard/supermicro/x11-lga1151-series/index.md b/Documentation/mainboard/supermicro/x11-lga1151-series/index.md
new file mode 100644
index 0000000000..79d2571009
--- /dev/null
+++ b/Documentation/mainboard/supermicro/x11-lga1151-series/index.md
@@ -0,0 +1,7 @@
+# X11 LGA1151 series
+
+The supermicros X11 series with socket LGA1151 are mostly the same boards with some minor
+differences in internal and external interfaces like available PCIe slots, 1 GbE, 10 GbE,
+IPMI etc. This is why those boards are grouped as "X11 LGA1151 series".
+
+- [X11SSH-TF](x11ssh-tf/x11ssh-tf.md)
diff --git a/Documentation/mainboard/supermicro/x11ssh-tf.md b/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssh-tf/x11ssh-tf.md
index 16e70d4a9f..79e7f3e5eb 100644
--- a/Documentation/mainboard/supermicro/x11ssh-tf.md
+++ b/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssh-tf/x11ssh-tf.md
@@ -15,7 +15,7 @@ The CH341 was found working, while Dediprog won't detect the chip.
For more details have a look at the [flashing tutorial].
The flash IC can be found between the two PCIe slots near the southbridge:
-![](x11ssh_flash.jpg)
+![](x11ssh-tf_flash.jpg)
## BMC (IPMI)
@@ -68,6 +68,6 @@ mainboard near the [AST2400]. This chip is an [MX25L25635F].
[flashrom]: https://flashrom.org/Flashrom
[MX25L25635F]: https://media.digikey.com/pdf/Data%20Sheets/Macronix/MX25L25635F.pdf
[N25Q128A]: https://www.micron.com/~/media/Documents/Products/Data%20Sheet/NOR%20Flash/Serial%20NOR/N25Q/n25q_128mb_3v_65nm.pdf
-[flashing tutorial]: ../../flash_tutorial/ext_power.md
-[Intel FSP2.0]: ../../soc/intel/fsp/index.md
+[flashing tutorial]: ../../../../flash_tutorial/ext_power.md
+[Intel FSP2.0]: ../../../../soc/intel/fsp/index.md
[Supermicro X11SSH-TF]: https://www.supermicro.com/en/products/motherboard/X11SSH-TF
diff --git a/Documentation/mainboard/supermicro/x11ssh_flash.jpg b/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssh-tf/x11ssh-tf_flash.jpg
index 8ab07f23c7..8ab07f23c7 100644
--- a/Documentation/mainboard/supermicro/x11ssh_flash.jpg
+++ b/Documentation/mainboard/supermicro/x11-lga1151-series/x11ssh-tf/x11ssh-tf_flash.jpg
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