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| author | Subrata Banik <subrata.banik@intel.com> | 2019-09-09 13:55:42 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-09-11 14:46:13 +0000 |
| commit | 1d260e65739e60cb0e3a72c38aded614ea4b193e (patch) | |
| tree | 7b205a0ce7a0f731858c4b969c0c91c2c47187d4 /Documentation/northbridge | |
| parent | 8edc6dc91f4a46cca81f99101fb13423615c586a (diff) | |
| download | coreboot-1d260e65739e60cb0e3a72c38aded614ea4b193e.tar.xz | |
intel/fsp2_0: Add help text for FSP_TEMP_RAM_SIZE Kconfig
For CML & ICL, FSP requires at least heap = 0x10000 and stack = 0x20000.
Refer to FSP integration guide to know the exact FSP requirement.
BUG=b:140268415
TEST=Build and boot CML-Hatch and ICL.
Change-Id: Ic1463181b4a9dca136d00cb2f7e3cce4f7e57bd6
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35301
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation/northbridge')
0 files changed, 0 insertions, 0 deletions