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| author | Angel Pons <th3fanbus@gmail.com> | 2020-05-02 16:46:44 +0200 |
|---|---|---|
| committer | Patrick Rudolph <siro@das-labor.org> | 2020-05-12 06:45:38 +0000 |
| commit | 2b6bb79fe46b020ad4568da90c8c4d819ea2885b (patch) | |
| tree | e00e38f7e2bc91a06bd89acc2ae392f3e3c2ad92 /Documentation/security/vboot | |
| parent | 561b8cc2e7469af7ad0796304a0c51684551e59a (diff) | |
| download | coreboot-2b6bb79fe46b020ad4568da90c8c4d819ea2885b.tar.xz | |
nb/intel/sandybridge: Reorder register write
Reorder the order of the operands in three register writes, so that
replacing them with macros in a follow-up does not change the binary.
Tested on Asus P8Z77-V LX2, still boots.
Change-Id: I44aee9c0f49770586de322ee7f44c3609dbadd0b
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40972
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation/security/vboot')
0 files changed, 0 insertions, 0 deletions