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| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2019-07-25 11:55:30 +0200 |
|---|---|---|
| committer | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2019-09-02 04:52:04 +0000 |
| commit | 5fffb5e30d0d0caa5bd3256fdce3f337bbef1d0f (patch) | |
| tree | 56a59b351e3fab3fc50843a753d8fcda635559af /Documentation/security | |
| parent | d947c691bc9bf30ee7276e96b60a727b6bbf06ff (diff) | |
| download | coreboot-5fffb5e30d0d0caa5bd3256fdce3f337bbef1d0f.tar.xz | |
security/intel: Add TXT infrastructure
* Add Kconfig to enable TXT
* Add possibility to add BIOS and SINIT ACMs
* Set default BIOS ACM alignment
* Increase FIT space if TXT is enabled
The following commits depend on the basic Kconfig infrastructure.
Intel TXT isn't supported until all following commits are merged.
Change-Id: I5f0f956d2b7ba43d4e7e0062803c6d8ba569a052
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34585
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Diffstat (limited to 'Documentation/security')
| -rw-r--r-- | Documentation/security/intel/txt.md | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/Documentation/security/intel/txt.md b/Documentation/security/intel/txt.md index f67b63942e..f80a731e81 100644 --- a/Documentation/security/intel/txt.md +++ b/Documentation/security/intel/txt.md @@ -90,11 +90,11 @@ correct state. If it's not the SINIT ACM will reset the platform. ## For developers ### Configuring Intel TXT in Kconfig -Enable ``TEE_INTEL_TXT`` and set the following: +Enable ``INTEL_TXT`` and set the following: -``TEE_INTEL_TXT_BIOSACM_FILE`` to the path of the BIOS ACM provided by Intel +``INTEL_TXT_BIOSACM_FILE`` to the path of the BIOS ACM provided by Intel -``TEE_INTEL_TXT_SINITACM_FILE`` to the path of the SINIT ACM provided by Intel +``INTEL_TXT_SINITACM_FILE`` to the path of the SINIT ACM provided by Intel ### Print TXT status as early as possible Add platform code to print the TXT status as early as possible, as the register is cleared on cold reset. |