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| author | Jacob Garber <jgarber1@ualberta.ca> | 2019-06-13 15:34:55 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-07-17 16:06:46 +0000 |
| commit | 715d60abce937a7891516cdbeae9eef70ef05cb2 (patch) | |
| tree | a873855dc5f913293dec87921619ce66a8cd0606 /Documentation/soc/intel/icelake | |
| parent | 1557a67c83b469e183b30f26d8e2f4c8ebb7d030 (diff) | |
| download | coreboot-715d60abce937a7891516cdbeae9eef70ef05cb2.tar.xz | |
sb/amd/sr5650: Add fine-grained bounds checking
The code currently checks that 4 <= dev_index <= 10, which after
subtraction by 4 can index into an array of length at most 7. This is
fine for the largest cpl array (which does have length 7), but is
too large for some of the others, which are smaller. This adds bounds
checks for each array access to ensure they are all within bounds.
Change-Id: I1610d35ca6cbb6cfb42c251e75b0e8b22b64252b
Signed-off-by: Jacob Garber <jgarber1@ualberta.ca>
Found-by: Coverity CID 1229676
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33458
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'Documentation/soc/intel/icelake')
0 files changed, 0 insertions, 0 deletions