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| author | Marshall Dawson <marshall.dawson@scarletltd.com> | 2018-04-30 17:59:27 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-06-13 21:21:09 +0000 |
| commit | c150a57d2989699198358e6066913f7e4dc8abc6 (patch) | |
| tree | c733d89abec7599efd070d373e986a076863ca2d /Documentation/superio | |
| parent | 10b52e0f2265aa978b0b2599504b1c818943f521 (diff) | |
| download | coreboot-c150a57d2989699198358e6066913f7e4dc8abc6.tar.xz | |
amd/pi: Add AgesaHeapRebase callout
Implement an optional callout for AgesaHeapRebase which allows AGESA
to override any internal hardcoded heap addresses.
Designate a region in CAR that may be used for pre-mem heap and return
that address before DRAM is configured. After DRAM is up, the address
in cbmem is returned.
TEST=Boot grunt with patchstack and experimental blob
BUG=b:74518368
Change-Id: Ieda202a6064302b21707bd7ddfabc132cd85ed45
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/25458
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'Documentation/superio')
0 files changed, 0 insertions, 0 deletions