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| author | Lee Leahy <leroy.p.leahy@intel.com> | 2015-09-17 11:50:39 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@gmail.com> | 2015-10-11 23:57:53 +0000 |
| commit | f45eb062da5a78425d52732b0a0a988b30457c24 (patch) | |
| tree | bbf55e6866ac925954aee49a2d9b8b2915854de7 /Documentation | |
| parent | b593366e349673cd4ef5b933849f78e6e958d626 (diff) | |
| download | coreboot-f45eb062da5a78425d52732b0a0a988b30457c24.tar.xz | |
skylake: SPI code cleanup
Move base address into iomap.h. Use PCI symbols instead of SPI specific
symbols. Fix comments.
BRANCH=none
BUG=chrome-os-partner:44827
TEST=Build and run on kunimitsu
Change-Id: Id5d21603150b52fd1b71dd448105938bd6aff1a9
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: http://review.coreboot.org/11826
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'Documentation')
0 files changed, 0 insertions, 0 deletions