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authorPatrick Rudolph <patrick.rudolph@9elements.com>2019-02-21 10:27:04 +0100
committerPhilipp Deppenwiese <zaolin.daisuki@gmail.com>2019-07-02 08:45:50 +0000
commitc1b7e8a60be9853b5b00fc70615cea2fa8bfafc5 (patch)
treebddec84d4dfa2bae068eb73fe6e85a1c2594ba58 /Documentation
parentc796a8f238f70a09828d5c40c23c05650803cb3c (diff)
downloadcoreboot-c1b7e8a60be9853b5b00fc70615cea2fa8bfafc5.tar.xz
cpu/x86/pae/pgtbl: Add memset with PAE
To clear all DRAM on x86_32, add a new method that uses PAE to access more than 32bit of address space. Add Documentation as well. Required for clearing all system memory as part of security API. Tested on wedge100s: Takes less than 2 seconds to clear 8GiB of DRAM. Tested on P8H61M-Pro: Takes less than 1 second to clear 4GiB of DRAM. Change-Id: I00f7ecf87b5c9227a9d58a0b61eecc38007e1a57 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31549 Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/arch/x86/index.md2
-rw-r--r--Documentation/arch/x86/pae.md15
-rw-r--r--Documentation/security/memory_clearing.md4
3 files changed, 21 insertions, 0 deletions
diff --git a/Documentation/arch/x86/index.md b/Documentation/arch/x86/index.md
index 3ecb9803a4..73c982385a 100644
--- a/Documentation/arch/x86/index.md
+++ b/Documentation/arch/x86/index.md
@@ -2,6 +2,8 @@
This section contains documentation about coreboot on x86 architecture.
+* [x86 PAE support](pae.md)
+
## State of x86_64 support
At the moment there's no single board that supports x86_64 or to be exact
`ARCH_RAMSTAGE_X86_64` and `ARCH_ROMSTAGE_X86_64`.
diff --git a/Documentation/arch/x86/pae.md b/Documentation/arch/x86/pae.md
new file mode 100644
index 0000000000..54cd82f2e4
--- /dev/null
+++ b/Documentation/arch/x86/pae.md
@@ -0,0 +1,15 @@
+# x86_32 PAE documentation
+
+Due to missing x86_64 support it's required to use PAE enabled x86_32 code.
+The corresponding functions can be found in ``src/cpu/x86/pae/``.
+
+## Memory clearing helper functions
+
+To clear all DRAM on request of the
+[Security API](../../security/memory_clearing.md), a helper function can be used
+called `memset_pae`.
+The function has additional requirements in contrast to `memset`, and has more
+overhead as it uses virtual memory to access memory above 4GiB.
+Memory is cleared in 2MiB chunks, which might take a while.
+
+Make sure to enable caches through MTRRs, otherwise `memset_pae` will be slow!
diff --git a/Documentation/security/memory_clearing.md b/Documentation/security/memory_clearing.md
index 3d985925d9..e5c19256b9 100644
--- a/Documentation/security/memory_clearing.md
+++ b/Documentation/security/memory_clearing.md
@@ -42,3 +42,7 @@ Without MTRRs (and caches enabled) clearing memory takes multiple seconds.
As some platforms place code and stack in DRAM (FSP1.0), the regions can be
skipped.
+
+## Architecture specific implementations
+
+* [x86 PAE](../arch/x86/pae.md)