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| author | Maxim Polyakov <max.senia.poliak@gmail.com> | 2020-07-14 21:00:20 +0300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-07-26 21:32:13 +0000 |
| commit | 21f50a8fd43aebbfdbb861c51a8ad58a03218a46 (patch) | |
| tree | 484b36736c1b7ab4d2abd6e42fa32d1f251253c5 /Documentation | |
| parent | a4be3e7d7f142eb2943e273fdb2fbc6e0c3459ab (diff) | |
| download | coreboot-21f50a8fd43aebbfdbb861c51a8ad58a03218a46.tar.xz | |
mb/ocp/tiogapass/gpio: undo set trig and bufdis for NF pads
According to the documentation [1], RX Level/Edge Configuration (trig)
and GPIO Tx/Rx Buffer Disable (bufdis) [2] settings are not applicable
in native mode and BIOS does not need to configure them. Therefore,
there is no need to configure this in gpio.h using PAD_CFG_NF_BUF_TRIG
macros. Use PAD_CFG_NF instead and set these fields to 0.
[1] Intel document #549921
[2] Intel document #336067-007US
This is part of the patch set
"src/mb/*, src/soc/intel/common/gpio: Remove PAD_CFG_NF_BUF_TRIG ":
CB:43455 - cedarisland: undo set trig and bufdis for NF pads
CB:43454 - tiogapass: undo set trig and bufdis for NF pads
CB:43561 - h110m: undo set trig and bufdis for NF pads
CB:43569 - soc/intel/common/gpio_defs: Remove PAD_CFG_NF_BUF_TRIG
Change-Id: Icdb6cb39934548e125461929701b33477a74f2a2
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43454
Reviewed-by: Michael Niewöhner
Reviewed-by: Lance Zhao
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation')
0 files changed, 0 insertions, 0 deletions