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| author | Furquan Shaikh <furquan@google.com> | 2020-06-05 00:31:21 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2020-06-10 18:39:15 +0000 |
| commit | 2778420f7f01fb3fb2d1de5b783d7da5ac2ee48a (patch) | |
| tree | c241b7194444fe282083276e5d2b4674937ea279 /Documentation | |
| parent | 24b642e72636346f3bfd196b9bcb84f7895d9aff (diff) | |
| download | coreboot-2778420f7f01fb3fb2d1de5b783d7da5ac2ee48a.tar.xz | |
Documentation: Add section about SPD tools for TGL and JSL
CB:41612 added a new set of tools for generating SPDs for TGL and JSL
based mainboards. This change adds relevant documentation to
coreboot-4.13 release notes.
Change-Id: I168adad25df9195dec64e8104f2dbe992eebddc6
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42092
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/releases/coreboot-4.13-relnotes.md | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/Documentation/releases/coreboot-4.13-relnotes.md b/Documentation/releases/coreboot-4.13-relnotes.md index 1d8839fea2..2910867f78 100644 --- a/Documentation/releases/coreboot-4.13-relnotes.md +++ b/Documentation/releases/coreboot-4.13-relnotes.md @@ -28,4 +28,15 @@ as an LPC resource). With this change, when a device in the tree is marked as that its resources can be placed in a more natural location. This also adds the ability for the device to participate in SSDT generation. +### Tools for generating SPDs for LP4x memory on TGL and JSL + +A set of new tools `gen_spd.go` and `gen_part_id.go` are added to automate the +process of generating SPDs for LP4x memory and assigning hardware strap IDs for +memory parts used on TGL and JSL based boards. The SPD data obtained from memory +part vendors has to be massaged to format it correctly as per JEDEC and Intel MRC +expectations. These tools take a list of memory parts describing their physical +attributes as per their datasheet and convert those attributes into SPD files for +the platforms. More details about the tools are added in +[README.md](https://review.coreboot.org/plugins/gitiles/coreboot/+/refs/heads/master/util/spd_tools/intel/lp4x/README.md). + ### Add significant changes here |