Documentation: Spell "blob" in lowercase

It's not an acronym (outside of database software).

Change-Id: I529561e4fc9889be7f9d6bd6d5f9a876e2007671
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/28827
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>

4 files changed, 6 insertions, 6 deletions

diff --git a/Documentation/lessons/lesson1.md b/Documentation/lessons/lesson1.md
index 4cbdf957e6..e6ff237ab5 100644
--- a/Documentation/lessons/lesson1.md
+++ b/Documentation/lessons/lesson1.md
@@ -144,7 +144,7 @@ hybrid configuration which may or may not work as expected.
 ### Step 6 summary - Build coreboot
 You may notice that a number of other pieces are downloaded at the beginning of
 the build process. These are the git submodules used in various coreboot builds.
-By default, the BLOBS submodule is not downloaded. This git submodule may be
+By default, the _blobs_ submodule is not downloaded. This git submodule may be
 required for other builds for microcode or other binaries. To enable downloading
 this submodule, select the option "Allow use of binary-only repository" in the
 "General Setup" menu of Kconfig
diff --git a/Documentation/mainboard/lenovo/xx20_series.md b/Documentation/mainboard/lenovo/xx20_series.md
index 976a29ba9f..8603853b94 100644
--- a/Documentation/mainboard/lenovo/xx20_series.md
+++ b/Documentation/mainboard/lenovo/xx20_series.md
@@ -26,8 +26,8 @@
 * Do **NOT** accidently swap pins or power on the board while a SPI flasher
   is connected. It will destroy your device.
 * It's recommended to only flash the BIOS region. In that case you don't
-  need to extract BLOBs from vendor firmware.
-  If you want to flash the whole chip, you need BLOBs when building
+  need to extract blobs from vendor firmware.
+  If you want to flash the whole chip, you need blobs when building
   coreboot.
 * The shipped *Flash layout* allocates 3MiB to the BIOS region, which is the space
   usable by coreboot.
diff --git a/Documentation/mainboard/lenovo/xx30_series.md b/Documentation/mainboard/lenovo/xx30_series.md
index e65a3f2a6f..ad856057f0 100644
--- a/Documentation/mainboard/lenovo/xx30_series.md
+++ b/Documentation/mainboard/lenovo/xx30_series.md
@@ -26,8 +26,8 @@
 * Do **NOT** accidently swap pins or power on the board while a SPI flasher
   is connected. It will permanently brick your device.
 * It's recommended to only flash the BIOS region. In that case you don't
-  need to extract BLOBs from vendor firmware.
-  If you want to flash the whole chip, you need BLOBs when building
+  need to extract blobs from vendor firmware.
+  If you want to flash the whole chip, you need blobs when building
   coreboot.
 * The *Flash layout* shows that by default 7MiB of space are available for
   the use with coreboot.
diff --git a/Documentation/northbridge/intel/sandybridge/nri_features.md b/Documentation/northbridge/intel/sandybridge/nri_features.md
index 51297bd5f6..d700b54be1 100644
--- a/Documentation/northbridge/intel/sandybridge/nri_features.md
+++ b/Documentation/northbridge/intel/sandybridge/nri_features.md
@@ -8,7 +8,7 @@
     * There might be errors to fix.
     * Position in romstage doesn't matter.
 2.  mrc.bin raminit
-    * Closed Source (aka BLOB)
+    * Closed Source (aka blob)
     * No known errors.
     * Needs to be placed at fixed offset in romstage.