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authorArthur Heymans <arthur@aheymans.xyz>2019-11-11 14:06:42 +0100
committerPatrick Georgi <pgeorgi@google.com>2020-02-28 10:42:57 +0000
commit4c28ccd0dc71d91f1a0f098a74add8701515c3a1 (patch)
tree7d530a1edc9e60d12d3e03bba2eaae43991b90ac /Documentation
parent084233bbb64a1ecfb255fb6ecb25451a5f16c2e6 (diff)
downloadcoreboot-4c28ccd0dc71d91f1a0f098a74add8701515c3a1.tar.xz
Docs/project_ideas.md: Add a memtest libpayload based payload
Change-Id: Iebdb75b99e18fe92aa4c801769532781edf44d9a Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36747 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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+++ b/Documentation/contributing/project_ideas.md
@@ -166,3 +166,21 @@ This is a research-heavy project.
### Mentors
* Ron Minnich <rminnich@google.com>
+
+## Libpayload based memtest payload
+[Memtest86+](https://www.memtest.org/) has some limitations: first and
+foremost it only works on x86, while it can print to serial console the
+GUI only works in legacy VGA mode.
+
+This project would involve porting the memtest suite to libpayload and
+build a payload around it.
+
+### Requirements
+* coreboot knowledge: Should know how to build coreboot images and
+ include payloads.
+* other knowledge: Knowledge on how dram works is a plus.
+* hardware requirements: Initial work can happen on qemu targets,
+ being able to test on coreboot supported hardware is a plus.
+
+### Mentors
+* TODO