summaryrefslogtreecommitdiff
path: root/Documentation
diff options
context:
space:
mode:
authorWim Vervoorn <wvervoorn@eltan.com>2019-10-10 16:41:32 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-10-16 14:09:26 +0000
commitea98989e2c6c734bf39239cfd77a540dbe11ab0d (patch)
tree9841ea5ad451965edf7a405f1c5566d232468955 /Documentation
parentd28d5071906e15c88939d889fbe40b117f5c303b (diff)
downloadcoreboot-ea98989e2c6c734bf39239cfd77a540dbe11ab0d.tar.xz
Documentation/mainboard/facebook: Add rev 1.3
Add rev 1.3 of the fbg1701 board. This adds Kingston memory. BUG=none TEST=none Change-Id: Iaba6f28368e2e4ca412122b5fa28ed93c705f4df Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35955 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'Documentation')
-rwxr-xr-x[-rw-r--r--]Documentation/mainboard/facebook/fbg1701.md9
1 files changed, 5 insertions, 4 deletions
diff --git a/Documentation/mainboard/facebook/fbg1701.md b/Documentation/mainboard/facebook/fbg1701.md
index 89e8a6abbc..e59627721a 100644..100755
--- a/Documentation/mainboard/facebook/fbg1701.md
+++ b/Documentation/mainboard/facebook/fbg1701.md
@@ -5,16 +5,17 @@ This page describes how to run coreboot on the Facebook FBG1701.
FBG1701 are assembled with different onboard memory modules:
Rev 1.0 Onboard Samsung K4B8G1646D-MYKO memory
Rev 1.1 and 1.2 Onboard Micron MT41K512M16HA-125A memory
+ Rev 1.3 Onboard Kingston B5116ECMDXGGB memory
-Use make menuconfig to configure `onboard memory manufacturer` in Mainboard
-menu.
+Use make menuconfig to configure `onboard memory manufacturer Samsung` in
+Mainboard menu.
## Required blobs
This board currently requires:
fsp blob 3rdparty/fsp/BraswellFspBinPkg/FspBin/BSWFSP.fd
Microcode Intel Braswell cpuid 1046C4 version 410
- (Used pre-build binary retrieved from Intel site)
+ (Used pre-built binary retrieved from Intel site)
## Flashing coreboot
@@ -25,7 +26,7 @@ The main SPI flash can be accessed using [flashrom].
### External programming
The system has an internal flash chip which is a 8 MiB soldered SOIC-8 chip.
-This chip is located to the top middle side of the board. It's located
+This chip is located on the top middle side of the board. It's located
between SoC and Q7 connector. Use clip (or solder wires) to program
the chip.
Specifically, it's a Winbond W25Q64FW (1.8V), whose datasheet can be found