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| author | Furquan Shaikh <furquan@google.com> | 2018-07-25 09:00:25 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-07-30 18:46:01 +0000 |
| commit | 520149dc63d5d09fc578cfc1a48f4b1ca2e2a08a (patch) | |
| tree | ef474a556f397f8ffc101aff4e26d33fad64cbaa /MAINTAINERS | |
| parent | cd62cac9e1f76d4086dc757701ad724a79654b1b (diff) | |
| download | coreboot-520149dc63d5d09fc578cfc1a48f4b1ca2e2a08a.tar.xz | |
mb/google/octopusi/variants/bip: Fix unused pins and those with external terminations
For unused pins, configure them as GPIO input and use the default
termination. For the pins where board has an external termination,
remove SOC's internal termintation.
BUG=b:110654510
TEST=On Bip, flashed image and verified that it boots to OS. Also
executed a few suspend resume cycles.
Change-Id: I343fed54ebc04199acecab257d7b8253d0a3d83b
Signed-off-by: Shamile Khan <shamile.khan@intel.com>
Reviewed-on: https://review.coreboot.org/27634
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'MAINTAINERS')
0 files changed, 0 insertions, 0 deletions