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authorMartin Roth <martinroth@google.com>2015-12-04 08:42:36 -0700
committerMartin Roth <martinroth@google.com>2015-12-29 18:23:03 +0100
commit173fe0732b262a6c3e2b91ca7fe341a50d01f3f8 (patch)
treeb60e0b7f14ceadcef2200b1ffb7aae18431be724 /MAINTAINERS
parent62c0276f94ca7a02f802df2611c8c567fbcfa809 (diff)
downloadcoreboot-173fe0732b262a6c3e2b91ca7fe341a50d01f3f8.tar.xz
MAINTAINERS: Designate Intel maintainer for FSP 1.0 Ivy Bridge
After several internal discussions, teams at Intel with stakes in coreboot have decided to each assign one or more maintainers. These maintainers can be expected to provide a point of contact for assistance with technical (code-related) issues, testing on real hardware, and making sure that their FSP-related areas continue to function with upstream coreboot. They understand that the inclusion of their information in the MAINTAINERS file does not give them any extra power over their areas. At the same time, nobody expects any community process to change. The one expectation is that reasonable efforts be made to contact these maintainers when making fundamental changes to their areas, or when discussing code removal. Change-Id: I33d95db12d9e394360a207c8fbcfbc15723115c6 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/12642 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: York Yang <york.yang@intel.com>
Diffstat (limited to 'MAINTAINERS')
-rw-r--r--MAINTAINERS12
1 files changed, 12 insertions, 0 deletions
diff --git a/MAINTAINERS b/MAINTAINERS
index 8280cb958b..9680a508d8 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -141,6 +141,18 @@ M: Stefan Reinauer <stefan.reinauer@coreboot.org>
S: Supported
F: src/mainboard/google/panther/
+INTEL FSP IVYBRIDGE/PANTHERPOINT/CAVECREEK & CRBs
+M: York Yang <york.yang@intel.com>
+S: Supported
+F: src/cpu/intel/fsp_model_206ax/
+F: src/northbridge/intel/fsp_sandybridge/
+F: src/southbridge/intel/fsp_bd82x6x/
+F: src/southbridge/intel/fsp_i89xx/
+F: src/vendorcode/intel/fsp1_0/ivybridge_bd82x6x
+F: src/vendorcode/intel/fsp1_0/ivybridge_i89xx
+F: src/mainboard/intel/cougar_canyon2/
+F: src/mainboard/intel/stargo2/
+
INTEL MINNOWBOARD MAX MAINBOARD
M: Martin Roth <gaumless@gmail.com>
S: Maintained