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| author | Maxim Polyakov <max.senia.poliak@gmail.com> | 2020-09-08 09:48:45 +0300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-09-21 08:10:15 +0000 |
| commit | 2b93bebc02c21a83938ce8a59f7a2023978a5068 (patch) | |
| tree | 56c8d67b52a54fb5c6b85ae9a09fd6c5c8a9ebe7 /MAINTAINERS | |
| parent | c07fb75c90e856bb2ea3fb7042bd633f1106861b (diff) | |
| download | coreboot-2b93bebc02c21a83938ce8a59f7a2023978a5068.tar.xz | |
mb/51nb/x210/gpio: 2/4 Exclude fields for PAD_CFG
This patch excludes bit fields that must be ignored (1,2) in order
to convert current macros to target PAD_CFG_*() macros. The following
commands were used for this:
./intelp2m -fld cb -ign -t 1 -file ../../src/mainboard/51nb/x210/gpio.h
- ignore RO bit fields;
- ignore RX Level/Edge Configuration (bit 26:25) and RX/TX Buffer
Disable (bit 9:8) for the native function, because it does not
affect the pad in this mode.
This is part of the patch set
"mb/51nb/x210/gpio: Rewrite pad config using intelp2m":
CB:43566 - 1/4 Decode raw register values
CB:43567 - 2/4 Exclude fields for PAD_CFG
CB:43568 - 3/4 Fixes PAD_RESET to convert to PAD_NC()
CB:43410 - 4/4 Convert field macros to PAD_CFG
Change-Id: Id0196b20783126c36f8552534b7ec3bd9049a24f
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43567
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'MAINTAINERS')
0 files changed, 0 insertions, 0 deletions