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| author | Youness Alaoui <youness.alaoui@puri.sm> | 2017-06-15 16:50:47 -0400 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-10-22 01:58:01 +0000 |
| commit | 3d60718f8239174b0d968666f39a86849ceea7cf (patch) | |
| tree | 5990d52cbd1ee9d3474ceb48c78d3f2f1350e67f /Makefile.inc | |
| parent | c0a32cad28a5557fd34171bf1cedb63ca1f1ebe0 (diff) | |
| download | coreboot-3d60718f8239174b0d968666f39a86849ceea7cf.tar.xz | |
purism/librem13v2: Change DRAM Rcomp/DQS values
The RComp values have been updated to match what is shown in the schematics.
Extracting the Memory configuration blob from the original BIOS (A blob
which contains the correct binary sequence matching the RComp values appears
in object with GUID 2D27C618-7DCD-41F5-BB10-21166BE7E143), I could find
and confirm the DQ and DQS mapping.
Small code cleaning in romstage.c with no effect.
Change-Id: I35c734269b365fd759e9bd56224a80a8a8df5a57
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
Reviewed-on: https://review.coreboot.org/22041
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Diffstat (limited to 'Makefile.inc')
0 files changed, 0 insertions, 0 deletions