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| author | Subrata Banik <subrata.banik@intel.com> | 2019-06-08 12:29:02 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2019-06-11 15:49:25 +0000 |
| commit | b5962a934a4dae3d84590dc8ef290f5fa8fec34b (patch) | |
| tree | 15660534b4daad4abc715f8bd4cffcb4197b2170 /Makefile.inc | |
| parent | 2395917adfd267a737beb38285a8e689b27235aa (diff) | |
| download | coreboot-b5962a934a4dae3d84590dc8ef290f5fa8fec34b.tar.xz | |
Rampayload: Able to build coreboot without ramstage
This patch removes all possible dependencies in order to build platform
with CONFIG_RAMPAYLOAD enable(without ramstage).
A. Create coreboot separate stage kconfigs
This patch creates seperate stage configs as below
1. HAVE_BOOTBLOCK
2. HAVE_VERSTAGE
3. HAVE_ROMSTAGE
4. HAVE_POSTCAR
5. HAVE_RAMSTAGE
B. Also ensures below kconfigs are aligned with correct stage configs
1. COMPRESS_RAMSTAGE and RELOCATABLE_RAMSTAGE are now enable if
CONFIG_HAVE_RAMSTAGE is selected.
2. COMPRESS_BOOTBLOCK will enable if CONFIG_HAVE_BOOTBLOCK is set
3. COMPRESS_PRERAM_STAGES will enable if CONFIG_HAVE_VERSTAGE
|| CONFIG_HAVE_ROMSTAGE is selected.
C. Also fix compilation issue with !CONFIG_HAVE_RAMSTAGE
On x86 platform:
Case 1: ramstage do exist: CONFIG_HAVE_RAMSTAGE=1
>> rmodules_$(ARCH-ramstage-y) will evaluate as rmodules_x86_32
Case 2: ramstage doesn't exist: CONFIG_HAVE_RAMSTAGE=0
>> rmodules_$(ARCH-ramstage-y) will evaluate as rmodules_
This patch fixes Case 2 usecase where platform doesn't select
CONFIG_HAVE_RAMSTAGE.
Also add option to create sipi_vector.manual based on $(TARGET_STAGE)
variable.
$(TARGET_STAGE)=ramstage if user selects CONFIG_HAVE_RAMSTAGE
$(TARGET_STAGE)=postcar if user selects CONFIG_RAMPAYLOAD
Change-Id: I0f7e4174619016c5a54c28bedd52699df417a5b7
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33142
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'Makefile.inc')
| -rw-r--r-- | Makefile.inc | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/Makefile.inc b/Makefile.inc index d4f7597e82..14cd50c79d 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -1058,7 +1058,14 @@ ifneq ($(FIT_ENTRY),) FIT_OPTIONS += -q $(FIT_ENTRY) endif -$(obj)/coreboot.rom: $(obj)/coreboot.pre $(objcbfs)/ramstage.elf $(CBFSTOOL) $$(INTERMEDIATE) +ifeq ($(CONFIG_HAVE_RAMSTAGE),y) +RAMSTAGE=$(objcbfs)/ramstage.elf +else +RAMSTAGE= +endif + +$(obj)/coreboot.rom: $(obj)/coreboot.pre $(RAMSTAGE) $(CBFSTOOL) $$(INTERMEDIATE) + @printf " CBFS $(subst $(obj)/,,$(@))\n" # The full ROM may be larger than the CBFS part, so create an empty # file (filled with \377 = 0xff) and copy the CBFS image over it. @@ -1128,8 +1135,8 @@ endif # CONFIG_NO_FIXED_XIP_ROM_SIZE endif # CONFIG_NO_XIP_EARLY_STAGES endif # CONFIG_ARCH_ROMSTAGE_X86_32 / CONFIG_ARCH_ROMSTAGE_X86_64 -cbfs-files-y += $(CONFIG_CBFS_PREFIX)/ramstage -$(CONFIG_CBFS_PREFIX)/ramstage-file := $(objcbfs)/ramstage.elf +cbfs-files-$(CONFIG_HAVE_RAMSTAGE) += $(CONFIG_CBFS_PREFIX)/ramstage +$(CONFIG_CBFS_PREFIX)/ramstage-file := $(RAMSTAGE) $(CONFIG_CBFS_PREFIX)/ramstage-type := stage $(CONFIG_CBFS_PREFIX)/ramstage-compression := $(CBFS_COMPRESS_FLAG) |