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authorGaggery Tsai <gaggery.tsai@intel.com>2018-05-22 12:32:48 -0700
committerFurquan Shaikh <furquan@google.com>2018-06-05 02:29:39 +0000
commit711fb811acd403301bb59499071a82ecf112f687 (patch)
treeaa8dca90d3d231ca33627e1495e67fe5c297c1ce /Makefile.inc
parentc07f8fbe6fd13e4245da71574b52b47e9733db84 (diff)
downloadcoreboot-711fb811acd403301bb59499071a82ecf112f687.tar.xz
soc/intel/skylake: Swap PCI devfn resides in same PCI device
After FSP-S, a device on PCI function n will be function swapped to function 0 if there is no device presnet on function 0. It needs some modification for DT and causes mismatches between software configuration and hardware schematic. This patch is from d779605, which swaps the devfn of the first enabled device in DT and function 0 resides in a PCI device. BUG=b:80105785 BRANCH=None TEST=Make sure the device is still enabled after coalescence with device on bus 0 and w/o device on bus 0. Test with suspend and resume and ensure it's consistent. Change-Id: Ibbc5d6e979977011f5904c8bd4b2f1be16bd23dc Signed-off-by: Gaggery Tsai <gaggery.tsai@intel.com> Reviewed-on: https://review.coreboot.org/26479 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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