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author | Kangheui Won <khwon@chromium.org> | 2020-08-06 19:03:23 +1000 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2020-08-11 23:16:42 +0000 |
commit | 7fe005ff30177db96d2ad31742404ac91330700e (patch) | |
tree | 482acf407371bf0655531f2d8a397b045c4357da /Makefile | |
parent | 108570654ed2b8a585414d70003e634d9667220b (diff) | |
download | coreboot-7fe005ff30177db96d2ad31742404ac91330700e.tar.xz |
amd/picasso/acpi: Add power resources for UART0
Follow-up for a31a769 -
"amd/picasso/acpi: Add power resources for I2C and UART".
Now PSP properly handles UART0 D3, we can shutdown UART0.
BUG=b:158772504
TEST=suspend_stress_test for 50 cycles,
* echo 1 > /sys/module/acpi/parameters/aml_debug_output
* dmesg | grep FUR to check on&off for FUR0
[ 2413.647500] ACPI Debug: "AOAC.FUR0._OFF"
[ 2413.736265] ACPI Debug: "AOAC.FUR0._ON"
Change-Id: I25457e18b69d28a83e42c2fe02b45a3979ad58cd
Signed-off-by: Kangheui Won <khwon@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44266
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'Makefile')
0 files changed, 0 insertions, 0 deletions